Hello ALL
good day
we are using S12ZVL128 IC. i have received FMEDA for S12ZVL128 IC
i have doubt in Clock_FMEDA_VL128_CUSTOMER sheet
Failure : Stuck-at on gate level
the following SMs are suggested
PLL Lock Interrupt used
[SM_0035]
[SM_1017]
[SM_0028] having a controlled diagnostic coverage of 60.0% and having a detected diagnostic coverage of 60.0%
Window COP Mode
[SM_1021] having a controlled diagnostic coverage of 90.0% and having a detected diagnostic coverage of 90.0%
Read back Clock configuration register within fault tolerant time interval
[SM_1030] having a controlled diagnostic coverage of 50.0% and having a detected diagnostic coverage of 50.0%
COP and COP Reset enabled
[SM_1020]
[SM_0028] having a controlled diagnostic coverage of 60.0% and having a detected diagnostic coverage of 60.0%
Question
for above failure(Stuck-at on gate level) we have implemented the SM =Window COP Mode
[SM_1021] having a controlled diagnostic coverage of 90.0% and having a detected diagnostic coverage of 90.0%
this SM is enough to meet coverage 90% ?? or we need implement all SMs which are suggested for above failure ???
