SCI reception problem

[JamesPev]

I'm using a MC9S12NE64, and seeing a very odd issue with the SCI. My SCI transmission works fine, but on reception I am seeing the high order bit getting flipped. When I send it characters, every other character has the highest order bit erroneously set. I set the debugger to stop on entrance to the SCI's ISR, so no code has executed before I see the value of the SC0DRL register. I have parity disabled, the data format field set correctly, and the baud rate field is set right. At first I thought it might be a noise issue so I dropped the baud rate down to 9600 but no change. It seems too constant to be noise anyways.

Has anyone else seen this problem? I have gone over all the SCI configuration settings and couldn't find anything suspect. Are there any silicon errata that could be effecting this?

Thanks for any ideas.

James

[mjbcswitzerland]

Hi James

There is no known problem with the SCI in the NE64. I have also used it in several projects with various settings and speeds with no difficulties.

You write that everything is set up correctly but please send a dump of the registers otherwise this can not be confirmed. I can then compare your settings with a known good project using the same values to see whether there is a difference.

Regards

Mark Butcher
www.mjbc.ch / www.uTasker.com

[JamesPev]

I just tried creating a simple project using processor expert and verified that the issue happens on there as well. Processor export also configured all the registers the same way I did.

I am using a 25mhz clock, 9600 baud serial. These are the register settings:
SCI0CR2:
SBK 0
RWU 0
RE 1
TE 1
ILIE 0
TCIE 0
SCTIE 0
SCI0CR1 is 0 (all bits disabled: PT,PE,ILT,WAKE,M,RSRC,SCISWAI,LOOPS)
SCI0BD is 81 decimal

To verify, I also tried this on my NE64 eval board (was using my custom hardware) and got the same results.

Any ideas? Thanks for the reply!

James

[mjbcswitzerland]

Hi James

SCI0CR2: rx and tx are enabled without interrupt support. Ensure that there is no overrun issue due to this and that the SCI is set up before writing this register.

SCI0BD 81 decimal is 19'200 when IREN (IR interface is not enabled)
SCI0BD = ((OSCCLK/16 + 19200/2)/19200); where OSCCLK is 25000000

Did you mean 19'200 BAUD?

Otherwise the settings are the same as mine.

Since you have tested on different hardware this should not be the issue. Check the speed again. If it gets desperate I can send you a binary of a working project which echoes received characters or serves a simple menu. Then you could at least compare the register set ups knowing that it really does run...

Good luck

Mark

[JamesPev]

Ok I found the issue after hooking a scope up to the port.

Apparently the serial port on my dell precision 380 desktop leaves off the stop bit on every other character it transmits.(can you say 'lame') This confuses the SCI on the Ne64 into setting the high bit. The dell's serial port convienently ignores it's own bugginess...

Switch to another machine... problem solved.


Thanks for all the help, sorry it ended at such a silly solution.

James

[bigmac]

Hello James,

When the problem was evident, I presume you would have produced framing errors.  I wonder if the serial port on the desktop machine is, for some reason, set up for data length of 7-bits, rather than 8-bits.

Regards,

Mac

[mke_et]

Could you have inadvertently set the Dell to 7 bits with a parity?

I didn't think any of the chips out there would allow anything to come out with no stop bits.