S9S12G128F0MLH-64-LQFP

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S9S12G128F0MLH-64-LQFP

1,459 Views
jagxin
Contributor III

Hi

 

I am using this Chip in  slave mode SPI interface is mentioned in the data sheet it is mentioned as Master out slave in

MISO pin from the micro controller is input or o/p when in slave  mode ?

Master out slave in is mentioned considering S9S12G128F0MLH as master or as slave ?

Labels (1)
Tags (1)
0 Kudos
5 Replies

1,115 Views
RadekS
NXP Employee
NXP Employee

Hi Agxin,

MISO pin is Mater In, Slave Out pin.

So, this pins is digital output in SPI slave mode and you should connect it with the input of SPI master (if you apply two-way communication).

 

The same way you should work with MOSI pin. It has to be connected to the output at SPI master device.

 

Also, the SCK pin acts as output/input according to master/slave mode selected. If SPI module is configured as the slave, it will be the input pin.

 

See Figure 21-11. Master/Slave Transfer Block Diagram in the datasheet.

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

1,115 Views
jagxin
Contributor III

dear Sir 

Thanks for the reply 

I also have some query regarding BDM Interface and ISP or ICP

1.Does this micro controller supports ISP or ICP  through UART ? OR only supports ISP through BDM interface 

2.Is Initial loading of code is also done through BDM  interface ?

3.What are the Tools supported  by this MC i mean debugging and bring up Programming IDE  ?

0 Kudos

1,115 Views
RadekS
NXP Employee
NXP Employee

Hi Agxin,
The MCU hardware itself support only code loading and debugging trough BDM interface.
However you can load bootloader code into MCU by BDM interface and main application load by SCI (UART) or by any other channel like LIN, CAN, SPI,…
See for example our application note AN4258 Serial Bootloader for S12(X) Microcontrollers Based on 180 nm Technology
http://www.nxp.com/files/microcontrollers/doc/app_note/AN4258.pdf
http://www.nxp.com/files/microcontrollers/doc/app_note/AN4258SW.zip


There are several tools which might be used as BDM interface (for loading and debugging):
You can choose between commercial or open source solutions.
I could recommend for example USB Multilink Universal or Cyclone PRO as example of commercial solution:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/mac7xxx-automotive-contro...
http://www.nxp.com/products/discretes-and-logic/mosfets/high-side-switches/cyclone-pro:M68CYCLONEPRO...

From open source solutions it is here for example OSBDM or USBDM:
www.pemicro.com/OSBDM
http://usbdm.sourceforge.net/USBDM_V4.12/html/index.html
The example of USBDM Pod:
http://www.technologicalarts.ca/shop/store/details/573/21/microcontrollers/9s12/usb-bdm-pod-for-s08,...
 
The most of NXP evaluation boards has already implemented BDM interface on board (typically OSBDM) include the smallest boards like TRK-USB-S12G128:
http://www.nxp.com/products/automotive-products/microcontrollers-and-processors/16-bit-s12-s12x-mcus...

0 Kudos

1,115 Views
jagxin
Contributor III

Dear sir 

Thanks for the reply again

If i want to program this micro controller's flash from any other processor running Linux if have connected the one wire interface and the reset input of the micro controller pins to the processor gpio is it possible to implement this one wire programming through a code for gpio (only for flashing the initial code ) or does it requires a dedicated hardware ?

0 Kudos

1,115 Views
RadekS
NXP Employee
NXP Employee

Hi Agxin,
Thank you for clarifying your request.
Yes, you may program S12G MCU by another processor. This should be possible also by single GPIO pin (In fact, you need also an additional pin for driving RESET pin).
Note: In that case, the S12G and another processor should share the same Ground signal and use the same voltage levels at GPIO pins. Otherwise, you need voltage level translator.
Please keep in mind that BKGD pin is bidirectional pin – the relative pin on another processor has to be configured as the open collector (Wired-OR).

The second limitation is speed. The BDM commands have defined pattern dependent on target bus clock.
The default S12G bus clock after reset is 6.25MHz. So, GPIO pin at your other processor has to be enough fast for fulfilling BDM timing characteristics.
For example: If we use another S12 MCU as a programmer with similar bus clock, we typically have to use assembler commands for fulfill timing requirements and keeping it as deterministic (with known length).
 
You may refer to open source BDM interface projects and use it for your reference.
Attached is also simple example code where we use the S12XE device for access to S12G trough BDM interface.

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------