S12g96 cop(Watch dog )issue

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S12g96 cop(Watch dog )issue

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玉敏111田
Contributor III

boot's cop is disable,app's wd is enable.

Question1.when flash the bootwithapp to mcu ,but debug found that the cop counld not wrok,Why?

Question2. when the cop's clock was ACLK,how to disable the cop ?

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RadekS
NXP Employee
NXP Employee

Hi,

The COP is driven by CPMUCOP register.

In special mode, you may write CPMUCOP register without restriction. Any write will restart COP timeout period.

In normal mode, you may write CPMUCOP register just once. If bootloader writes CR[2:0] as “000”, the application cannot change it without MCU restart.

CPMUCOP.png

Please check the complete CPMUCOP write conditions in RM. 


I hope it helps you.

Have a great day,
Radek

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玉敏111田
Contributor III

Thanks .I have read the data sheet .And when I debug the EntryPoint Function with the breakpoint ,I found that WRTMASK was 0 rather than 1!

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