S12 ZVML Hall Sensor Sleep Mode

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S12 ZVML Hall Sensor Sleep Mode

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pratibhasurabhi
Contributor V

Dear All,

I am using MagniV S12ZVML64  for 3 phase HALL sensored based application.

I am thinking about implementing Full Stop Mode for the same.

I want to know how the Full STOP mode will affect the EVDD1 ( external power supply) pin for the hall sensor.

In Full Stop mode , does the EVDD1 supply turn off?

If yes can you please tell me where is it mentioned inn datasheet.

If not then , what is the effect of STOP mode on EVDD1? Does the current consumption becomes less?

Thank you in advance!!

8 Replies

501 Views
pratibhasurabhi
Contributor V

Hi Danial,

In our application, there is no other functionality enabled on PTP0.

I have tested code as below,

main()

{

MODRR2_T0IC1RR = 0x01;               /* TIM0 input capture channel 1 is connected to logic XOR of PT1, PT2, PT3 */

PERT = 0x0E;                                      /* Hall sensor PT1, PT2, PT3 pull device is enabled */
PTP_PTP0 = 1;

DDRP_DDRP0 = 1;

while(1)

{

   /* after 500ms of delay below code is executed */

ADC0CTL_0_ADC_SR = 1;

PTP_PTP0 = 0;

CPMUOSC_OSCE = 0;
DisableInterrupts;

 ASMNOP;
ASMNOP;
ASMNOP;
ASMNOP;

asm ANDCC #0x7F;             /* Clears S bit , enable STOP instruction */
ASMNOP;
ASMNOP;

asm STOP;

}

After executing this code, observed that, after 500ms of power up, EVDD1 pin output is high(4.8V) after entering into stop mode. As shown in below screenshot,

pastedImage_5.png

Even after setting PTP0 pin to low the output at EVDD1 is high.

As per my understanding, hall supply will not get disabled for above setting.

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501 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Pratibha,

I have tried the very code you provided without any modification on S12ZVML12 EVB and it works as expected.

The PP0 pin goes HIGH for 2us then LOW and the MCU enter Stop mode.

pastedImage_1.png

Have you tried running this simple code on an EVB?

 

Thanks,

Daniel 

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501 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Pratibha,
EVDD1 is supplied by VDDX (Table 1-8, S12ZVM RM r.2.11).
The VDDX regulator enters Reduced Performance Mode (RPM) when the MCU goes to Stop Mode (Section 8.1.3.3)
The load IDDX current in RPM is specified in Table B-1.
“In stop mode the over-current monitor is disabled for power saving. The increased current capability cannot be maintained to supply the external device. Therefore when using the pin as power supply the external load must be powered down prior to entering stop mode by driving the output low” (Section 2.5.3).

Regards,
Daniel

501 Views
pratibhasurabhi
Contributor V

danielmartynek

Hi Daniel,

Thanks for the quick reply

I had few doubts hope you can clear them up.

1.While the MCU is in STOP mode ,if i turn off the supply and switch it back on again (basically a Power on reset ),will the MCU still remain in STOP mode or wake up from STOP ?

2. For putting in STOP mode , certain asm instructions are to be executed.Instead ,can we put MCU in STOP mode through debug window?.

3. While MCU is in STOP mode, if my debugger is connected, does it loose connection or not ?

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501 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Pratibha,

1. The MCU will be reset. It is always the same after POR.
2. Although you can clear the S bit in the debug window, there needs to be the STOP instruction executed.
3. It depends on the BDCCIS bit in the BDCCSRx register. Please refer to Section 5.1.3.3 Low-Power Modes in the S12ZVM RM r.2.11.

Regards,
Daniel

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501 Views
pratibhasurabhi
Contributor V

Dear Daniel,

Thank you for your support.

Before entering into sleep mode, I have to disable hall supply.

To disable the hall supply, 

PTP_PTP0 is set to 0 before executing stop command.

But it is observed that, the output at EVDD1 is always +5V even after setting the PTP0 to low.

Please guide on this.

Request you to inform if I am missing some settings to disable hall supply.

Thank You.

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501 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Pratibha,

The EVDD1 funtion of the PTP0 is basically a GPIO with high current capability.

Configuring the pin direction as output automatically enables the EVDD1 funtion.

DDRP_DDRP0 = 1; // OUTPUT

It can be driven by the PTP register as any other GPIO. And the PORT maintains its previously configured state during Stop mode.

PTP_PTP0 = 0; // LOW

Unless there is another function with a higher priority enabled on PTP0.

pastedImage_1.png

 

Have you tested it with a simple code that just drives PTP0 and enters Stop mode?

Regards,

Daniel  

501 Views
pratibhasurabhi
Contributor V

Hi Danial,

In our application, there is no other functionality enabled on PTP0.

I have tested code as below,

main()

{

MODRR2_T0IC1RR = 0x01;               /* TIM0 input capture channel 1 is connected to logic XOR of PT1, PT2, PT3 */

PERT = 0x0E;                                      /* Hall sensor PT1, PT2, PT3 pull device is enabled */
PTP_PTP0 = 1;

DDRP_DDRP0 = 1;

while(1)

{

   /* after 500ms of delay below code is executed */

ADC0CTL_0_ADC_SR = 1;

PTP_PTP0 = 0;

CPMUOSC_OSCE = 0;
DisableInterrupts;

 ASMNOP;
ASMNOP;
ASMNOP;
ASMNOP;

asm ANDCC #0x7F;             /* Clears S bit , enable STOP instruction */
ASMNOP;
ASMNOP;

asm STOP;

}

 

After executing this code, observed that, after 500ms of power up, EVDD1 pin output is high(4.8V) after entering into stop mode. As shown in below screenshot,

pastedImage_5.png

 

Even after setting PTP0 pin to low the output at EVDD1 is high.

As per my understanding, hall supply will not get disabled for above setting.

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