Pulse Accumulator interrupt when the pulse count reaches x

[yücekürüm]

Hi,

Im using mc9s12p128 and im tryinng to count the pulses from PT7 until it reachhes a

value and calls an interrupt.

-Im using PT7 as PACLK (timer clock) and counting the signal

but im not sure where the compare is done or where i should

store the values for compairing.

-is it possible to use other timer channels to compare more than a

value with the timerCounter(while getting the timerClock from

PT7)? Example: Interrupt occurs when the value x is reached and y is reached.

-Does using PT7 as timer clock effects anything except timer?

(maybe ISR?)

Could you send an example code of initialisation for something like this.

Thank you.

[iggi]

Hi,

Pulse accumulator can be set to the Event counter mode which allows incrementing the PACNT by a count each time there is pulse on IOC7 pin (falling/rising edge; see Table 14-17. PACTL Field Descriptions in the S12P RM).

So you can use this to read and store the PACNT value and then compare it with desired one.

An other solution could be IRQ input pin. If the frequency of pulses on the input pin is not so high, you can use simple code to count the number of pulses on the input.

Define global variable and give it a value of pulse number you expect e.g. i=127;

Then define the IRQ interrupt routine which is called each time there is a pulse on the IRQ pin.

In the IRQ_ISR, you should compare and decrement the 'i' value (i<1, --i) and do this until it reaches zero. And here you should do what you want.

I've tested this on S12P demo board and it works fine. The SW sample code will be posted soon.

Actually, this solution can be implemented on IOC7 with PAIF.

Btw, your last question is not so clear. PT7 is the port which can be used as GPIO. But timer if enabled has higher priority over GPIO function.

Regards,
Ivan

[yücekürüm]

Thanks,

Input signal may be as high as 1KHz so i was thinking of letting the accumulater do the job but it seems like im gonna have to find another way.

My last question is answered. i was wondering, if using the accumulator would prevent the other timer interrupts and it does not.

Thanks.

Yüce

[kef2]

1kHz is pretty low interrupt frequency. At max 32MHz bus clock you have 32M/1k = 32000 bus cycles for one pulse. Interrupt entry + interrupt exit + counter increment + counter compare needs about 30 bus cycles only.

[kef2 · Accepted solution]

There's no pulse accumulator counter compare function. You have only two interrupts associated with pulse counter: pulse accumulator input interrupt (PAI) and pulse counter overflow interrupt (PAOVI).