Thanks for your reply. Here are the answers to your questions:
>>What is "sizeof(@far @gpage unsigned char *)" for the cosmic compiler? Does the cosmic >>compiler reserve 3 or 4 bytes for far pointers?
I think we have a winner! Cosmic defines them as 4 bytes. I dropped the ball here, in other forum posts, I read far pointers are 3 bytes, but that's for CodeWarrior....not COSMIC.
This also further explains why the definition of hal_pulseo_chan_map was messed up in the list file. There was an additional byte I could not account for.
Today I learned something extremely valuable about compilers. I was under the impression that the pointer definitions would be the same since the generated code is for the same processor. Not
the case. I obviously have a lot to learn about compilers.
>>Are the offsets (and sizes) of all the structs members the same for the S12X and the XGATE >>compiler? You could check that at compile time by computing it with the ANSI offsetof macro and >>comparing it to the expected value.
No point in answering this question.....I'll have to change the definitions anyway.
>>What address values do you get in the structure when reading them from the S12X or from the >>XGATE? What is in memory? What do you expect, what do you find?
S12X
temp = 0x00 (correct/expected/verified location in memory by using debugger)
temp1 = 0x258 (correct/expected/verified location in memory by using debugger)
XGATE
temp = 0xFF (incorrect)
temp1 = 0x0002 (incorrect)
>>Is the explicit cast in the initialization necessary?
I've tried this code with and without the cast and it doesn't work. Also, the compiler manual calls out the requirement for declaring a global pointer as @far @gpage when accessable via the GPAGE register.
>>I'm also not sure what you refer to with "the array address", which appears correct to the XGATE, >>you mean the address from which the port_address field is read from?
Actually no. Let me explain. I set a pointer in the XGATE code to point to the array pulseo_chan_map (just to test the address). The XGATE code reads the pulseo_chan_map address as 0x0F4E. This value is correct, since the output *.MAP file shows the address of pulseo_chan_map as 0x780F4E.
>>In the end, if the goal is to point to different port addresses, then the simplest solution is probably >>just to use S12X near pointers as the addresses of all peripherials are the same for the XGATE and >>the S12X (for any pointer type...). Only addresses of RAM or FLASH locations are different in >>between the two cores and need the special handling.
I have tried this approach before beginning this forum post. On the S12X side I created the pulseo_chan_map array without defining a separate definition for the XGATE and also without forcing the global pointer via @far @gpage. The XGATE code was also unable to access the structure members properly. I was observing very similiar results.
What's interesting, however; is in other portions of my code I am able to correctly access an array of structures defined on the S12X side with the XGATE (by using the #pragma align on/off). The only difference is that the structures I am able to share do NOT contain pointers. As such, I began this approach as a slick way to allow for pointers in these structures.
I'll take another STAB at my proposed solution (I couldn't resist the HC11/12 humor), but now assuming the correct pointer size.
If you have any other thoughts, please let me know. I will also update this thread with what happens.
Dave
Message Edited by Dave Subert on 2009-05-08 01:22 AM