MC9S12ZVC has a on-chip voltage regulator with ballast pins BCTL and BCTLC which supply base current to the ballast transistor to get VDDX, VDDA and VDDC. The reference design uses a 5.6V zener diode at the VDDX and VDDA but the data sheet says it is a 5V input. If they are generated by the on-chip regulator why use a 5.6V zener at VDDX and VDDA? I have attached the screenshot of the schematic below.
Please Advice.Thank you!
BCTLC pin for sure should be better known in case of zener diode voltage regulator in that applications
Hi Raskhith,
As Daniel wrote, I also suppose that this zener diode is assembled only as protection against transient effects at VDDC pin.
However, it seems that there is obviously the error on the schematic in case of BCTLC pin connection. This pin should be connected to the PNP transistor base. This pin drives current to the PNP transistor base for achieving 5V at VDDC pin.
Per AN4867:
Since absolute maximum for BCTLC pins is 42V, I suppose that this incorrect connection will not damage the regulator itself. However, the regulator obviously cannot work in this case and we cannot guarantee VDDC voltage and CAN PHY functionality.
I hope it helps you
Have a great day,
Radek
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Hi Radek,
Thank you for your response and also pointing out an obvious error which dint happen to come to my mind. Your response really helped me get a better understanding.
Regards,
Rakshith
Hello Rakshith,
Table E-1, S12ZVC RM r.1.9 specifies VDDX, VDDC in the range of 4.8; 5.15V with External ballast PNP in Full performance mode.
But more importantly, the absolute max rating for the voltage domains is 6V (Table A-2).
Absolute maximum ratings are stress ratings only. A functional operation outside these ranges is not guaranteed.
Stress beyond these limits may affect the reliability or cause permanent damage of the device.
Regards,
Daniel
Hi Daniel,
Thank you for your response, it really helped me get a better understanding.
Regards,
Rakshith