MC9S12Z, How to setup IVT and reset vector table for an application linker to work with an FBL

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MC9S12Z, How to setup IVT and reset vector table for an application linker to work with an FBL

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Schuma6
Contributor I

I am now working for an FBL program(via LIN bus) to be integrated into my application SW which was working on MC9S12ZV128. FBL SW is a purchased third-party-package, I need to do some adaption.

But now I got problem from the FBL program when using VFlash to download the application hex file, that the FBL always returns negative response via LIN whenever the application SW ends at an address very close to the ROM end address 0xFFFFFF, I know now the root cause of the negative response is regarding the Presence Pattern strategy used by the FBL because FBL SW needs additional 32bytes to put behind the logical blocks from the transmitted application hex file, however my application SW hex file end address in ROM does not allow FBL to add further bytes.

Application SW original location in ROM is 0xFE0000, for the FBL which costs ROM around 28KB so I shifted application SW to address 0xFE7000, with the current build linker setup in the codewarrior the interrupt vector table starts from 0xFFFE10 to 0xFFFFFB, followed by the Reset vector table at 0xFFFFFC to the end 0xFFFFFF. The point is that the linker would automatically put the Reset vector table at the end of the hex file and I know that  Reset vector table can not be shifted even if the interrupt vector table in front can be shifted.

Anyway, there is also another problem of the application SW start, that is, if I move the interrupt vector table to another address, eg. 0xFFF700, after normal flash process(not by FBL) the SW can not start, is there any dependencies in the setup between interrupt vector table and Reset vector table? from the codewarrior configuration tool Processor Expert there seems to be only the address and size configuration, and an Init IVBR register which can be set to yes or no but I do not understand what it means with the description of

"IVBR can be suppressed by setting to NO. This feature can be useful for bootloader. If enabled, IVBR is initialized with high byte value of interrupt vector table address. ........"

 

Thanks a lot!

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Schuma6
Contributor I

uploaded screenshot is current setup of the interrupt vector table and reset vector table in codewarrior

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lama
NXP TechSupport
NXP TechSupport

Hi,

I am sorry but we do not support 3rd party packages.

All S12 bootloaders works on the approximately same principle. The simple bootloader can be found here also with explanation. Probably it can also help. Plus i tis good to read AN4258 written for S12XE family – different memory but principles related to IVBR are described.

Also, for S12Z:

https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Simple-Serial-Bootloader-for-S12Z-AN-draft/...

Best regards,

Ladislav

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