Daniel,
Wen,
While the total number of writes to the EEE RAM buffer is dependent on the DFlash to RAM buffer ratio, the minimum guaranteed number of erase cycles for any given sector is still 50,000. The trouble with using the EEE beyond a point where the erased sector count reaches its maximum, is you really have no idea how many times past the minimum or even typical specification the sectors have been erased. Unless of course you can calculate it based on the software doing regular periodic writes.
The Flash in the 180nm devices is very robust and in most cases can be used way beyond the specified minimum, as indicated in the typical specification. However, at some point, the sectors will begin to fail as indicated by the dead sector count.
Before I retired from NXP, I was involved with an automotive customer that had a bug in their software that wrote new data to the EEE RAM buffer every 10 mS while the car was running. It in fact took years and an estimated millions of erase cycles before problems began to show up, however, the EEE still began to fail.
The minimum erase cycle specifications are set based on voltage, temperature and process variations. While fab processes are generally very well controlled, they can at times drift to "corner " or worse cases where the devices will still meet the minimum specifications, but may not be quite as robust and I'm not saying this is the case here.
So, bottom line is, you can use a device to the typical specifications, but you shouldn't.
Regards,
Gordon
