MC9S12DT256-QFP112 25Mhz Bus Clock frequency

[jgo]

to: someone who knows something
re: MC9S12DT256-QFP112 25Mhz Bus Clock frequency
Fri 5/08/2009 6:51 pm

I took over an HC12 project and I have a mystery: my bus clock, which I actually measured with an oscilloscope at pin 39 ECLK, seems to be 4.1666 Mhz. With a 25 MHz crystal.

I suspect it has something to do with the PLL mechanism? It "normally" turns on the PLL clock and sets it to 48Mhz, which produces a bus clock of 24 MHz -- which shows-up that way on the scope (2 divisions of 20 nS). This suggests the crystal is working correctly since various calculations like baud and timers seem to work correctly.

But when I run the software without the PLL boost, I get this 4.1666 Mhz bus clock -- about 1.2 division of 200nS. It's supposed to be XTAL/2 ==> 12.5Mhz -- I think....

Is there some "divide bus clock" register I just didn't notice?

//+ I just noticed, at least one pdf says MC9S12DT256 is rated for a maximum of 16MHz oscillator. ... Is that true? That would certainly make trouble....

-- thanx for help,

j.g. owen * * * * * * * * * * * * * * * * * * *
web:   http://owenlabs.home.att.net/
email: owen_bda4@yahoo.com
* * * * * * * * * * * * * * * * * * * * * * * *

[Lundin]

S12DT256 can only run at 25MHz bus either when a "Pierce" oscillator circuit or when an external oscillator is used. If you are using a "Colpitts" oscillator, it will not work. This is described in detail in the manual.

What you likely are measuring on ECLK is "self clock mode", also known as "limp-home". When the S12 finds out that the oscillator is malfunctioning, it is using an internal inaccurate oscillator instead. This internal oscillator is typically around 2-4MHz, something like that. You could try to disable self clock mode and see if the bus clock dies entirely.

If you are in self clock mode, it means that your oscillator is malfunctioning. Apart from the need of a "Pierce" oscillator, you need to check are the PORTE:7 pin, which selects between Colpitts/Pierce. You will need an external pull-down on this pin.

I suppose it could also be related to the PLL, but that is less likely.

(Soldering of the crystal is the most common problem)