Hi,
I am a little bit confused. The C in the examples is like flow chart in the form I provide it. Moreover, you can use disassemble function. Mouse right button click at C code. Plus you can compare Figure 19-26. Example Program Command Flow from the data sheet with code. Yu can also use simulator for these MCUs or just load my example int the MCU you have and step it. Important note....Do not visualize in memory window of debugger the flash address which is currently E/W. Why? Because BDM reads it and it is also reading while writing. For tests, it is better to read the written word back to some variable....or you can move memory window up and down. Next good note is to set for flash "refresh memory when halting" in the debugger

select correct flash blocks...this is only example

and match "refresh memory when halting"

Of course it is suitable if you also think about critical section and execution part of the code out of the flash…already described.
Few words about memory map.
If memories overlap then following priority scheme is valid. (page 127)
Highest - BDM (internal to core) firmware or register space
…..... Internal register space
…..... RAM memory block
…..... EEPROM memory block
…..... On-chip FLASH or ROM
Lowest - Remaining external space
Default value of the RAMHAL bit (INITRM) is 1 so the 4k RAM is mapped to higher part of the RAM block.
However, 4kRAM is mappable to 4k block so RAMHAL has no meaning in the case of this MCU.
Moreover, INITRM[7..3] is set to 0b00001 the RAM is placed to the 4k block where address 0b00001000 00000000 or 0x0800 belongs.
0000-0FFF 1st 4k block of RAM mapping possibility
1000-1FFF 2nd 4k block of RAM mapping possibility
2000-2FFF 3rd 4k block of RAM mapping possibility
3000-3FFF 4th 4k block of RAM mapping possibility
So, by default the RAM is mapped to the space 0000-FFFF which means
0000-0FFF 1st 4k block of RAM mapping possibility
If the Registers are mapped 0000~03FF and RAM is mapped 0000~0FFF then addresses:
- 0000~03FF – address the registers
- 0400~FFFF – address the RAM (1st kB is overlapped by Regs)
Near flash
- 4000~7FFF – non paged flash addressable also via paged "far" address 0x3E_(8000~BFFF)
- C000~FFFF – non paged flash addressable also via paged "far" address 0x3F_(8000~BFFF)
Far flash
- 0x3C_(8000~BFFF) - paged flash
- 0x3D_(8000~BFFF) - paged flash
- 0x3E_(8000~BFFF) - paged flash addressable also via no page "near" address 4000-7FFF
- 0x3F_(8000~BFFF) - paged flash addressable also via no page "near" address C000-FFFF
If you use default mapping then you have smaller RAM.
The flash… data sheet page 18…
Memory options:
— 64K, 96K, or 128Kbyte Flash EEPROM (erasable in 1024-byte sectors)

The word which is written must be in erased status. Cumulative programming is not allowed. So, writing to erased word is not problem anytime, but if you want to rewrite byte you have to erase entire sector and write back what was erased together with modified word. Now it is up to your SW how often you will erase sectors and what approach you will develop because the flash has given number of erase cycles for sector.
The examples always erase sector before it is written…just an example.
Best regards,
Ladislav