Iam developing a MSCAN driver in Processor Expert in CW 5.1.
I am not able to configure Identifier Registers (IDR0–IDR3) in MC9S12XDP512 .
Available registes for configuring Standard IDs as in IO_Map.h are:
code:
when I make queue 0 entry as below and initiate Tx I get error(in CANoe Trace) as: Error in ID 20 to 18 or some times as error in delimeter.
SetMSCAN_TxQueue0_Entry(0x2BC,0x08,&actTransmitBuf_au8[0]); /* Queue0 */
and Inititae Transmission by mscanbase_ps->CANTFLG = 1;
plz help in this regard if any body has worked with MSCAN for same uCtrlr
/*** CAN0TXIDR0 - MSCAN 0 Transmit Identifier Register 0; 0x00000170 ***/
typedef union {
byte Byte;
struct {
byte ID21 :1; /* Extended format identifier Bit 21 */
byte ID22 :1; /* Extended format identifier Bit 22 */
byte ID23 :1; /* Extended format identifier Bit 23 */
byte ID24 :1; /* Extended format identifier Bit 24 */
byte ID25 :1; /* Extended format identifier Bit 25 */
byte ID26 :1; /* Extended format identifier Bit 26 */
byte ID27 :1; /* Extended format identifier Bit 27 */
byte ID28 :1; /* Extended format identifier Bit 28 */
} Bits;
} CAN0TXIDR0STR;
extern volatile CAN0TXIDR0STR _CAN0TXIDR0 @(REG_BASE + 0x00000170UL);
/*** CAN0TXIDR1 - MSCAN 0 Transmit Identifier Register 1; 0x00000171 ***/
typedef union {
byte Byte;
struct {
byte ID15 :1; /* Extended format identifier Bit 15 */
byte ID16 :1; /* Extended format identifier Bit 16 */
byte ID17 :1; /* Extended format identifier Bit 17 */
byte IDE :1; /* ID Extended */
byte SRR :1; /* Substitute Remote Request */
byte ID18 :1; /* Extended format identifier Bit 18 */
byte ID19 :1; /* Extended format identifier Bit 19 */
byte ID20 :1; /* Extended format identifier Bit 20 */
} Bits;
struct {
byte grpID_15 :3;
byte :1;
byte :1;
byte grpID_18 :3;
} MergedBits;
} CAN0TXIDR1STR;
extern volatile CAN0TXIDR1STR _CAN0TXIDR1 @(REG_BASE + 0x00000171UL);
/*** CAN0TXIDR2 - MSCAN 0 Transmit Identifier Register 2; 0x00000172 ***/
typedef union {
byte Byte;
struct {
byte ID7 :1; /* Extended format identifier Bit 7 */
byte ID8 :1; /* Extended format identifier Bit 8 */
byte ID9 :1; /* Extended format identifier Bit 9 */
byte ID10 :1; /* Extended format identifier Bit 10 */
byte ID11 :1; /* Extended format identifier Bit 11 */
byte ID12 :1; /* Extended format identifier Bit 12 */
byte ID13 :1; /* Extended format identifier Bit 13 */
byte ID14 :1; /* Extended format identifier Bit 14 */
} Bits;
} CAN0TXIDR2STR;
extern volatile CAN0TXIDR2STR _CAN0TXIDR2 @(REG_BASE + 0x00000172UL);
/*** CAN0TXIDR3 - MSCAN 0 Transmit Identifier Register 3; 0x00000173 ***/
typedef union {
byte Byte;
struct {
byte RTR :1; /* Remote Transmission Request */
byte ID0 :1; /* Extended format identifier Bit 0 */
byte ID1 :1; /* Extended format identifier Bit 1 */
byte ID2 :1; /* Extended format identifier Bit 2 */
byte ID3 :1; /* Extended format identifier Bit 3 */
byte ID4 :1; /* Extended format identifier Bit 4 */
byte ID5 :1; /* Extended format identifier Bit 5 */
byte ID6 :1; /* Extended format identifier Bit 6 */
} Bits;
struct {
byte :1;
byte grpID :7;
} MergedBits;
} CAN0TXIDR3STR;
extern volatile CAN0TXIDR3STR _CAN0TXIDR3 @(REG_BASE + 0x00000173UL);
Please some body respond to this query in configuring the CAN0TXIDR0- CAN0TXIDR03 in MSCAN for MC9S12XDP512 .