How to erase and partition MC9S12XEG128CAL emulated EEPROM in Normal single chip mode?

[saurabhupadhyay]

HI,
We have ported our code for MC912DG128CCPVE to  MC9S12XEG128CAL. To test the ported code on Vector VT system, I need to change some data in EEPROM and replace it with my data. I have few questions related to that:

1. Is there a way that would corrupt EEPROM configuration information ? If yes, how to erase then re-configure in Normal Single chip mode ?
2. How firmware know that RAM buffer content has been completely transferred into emulated EEPROM ? 
3. Does the characteristics of emulated EEPROM in MC9S12XEG128CAL are equivalent to those of MC912DG128CCPVE?I am using Code Warrior IDE V5.1. I have read many article related to this but I am not able to understand how to erase data in Normal Single chip mode and how to confirm transfer of data to Emulated EEPROM. I have Initialized the EEPROM using the FTM command sequence given in AN3743.

[RadekS]

Hi Saurabh,

1. The EEPROM partitioning should not be able to break any way under normal conditions (exclude some rare cases like some coming neutrons from the space). The partition command may be executed just once in normal mode. The typical S12XE EEPROM issue is based on incorrect partition procedure – like unfinished command due to MCU reset (the D-flash is not fully formatted, the EEPROM stops work after some time) or lower data retention due to the wrong flash clock during programming (the bit cells may be insufficiently erased/programmed).

The partition information may be erased only by mass erase (erase all blocks) command in special chip mode. The partition configuration at already partitioned MCU cannot be changed in normal single chip mode.

The simplest way how to execute mass erase command is the unsecure procedure.

In Code Warrior debugger menu ->MultilinkCyclonePro->Unsecure…

If not work you can use unsecure12 from P&E:

http://www.pemicro.com/downloads/download_file.cfm?download_id=16

2.The Buffer RAM write accesses are watched by EEPROM state machine (if enabled) and writes are stored in the queue according to internal logic. You may indirectly watch this queue by ETAG counter. For example: while((ETAG > 0) || (FSTAT_MGBUSY == 1)); //we can wait for EEE to finish.

3. No, the S12D has standard EEPROM with robust memory cells. Unfortunately, this solution needs too big area at silicon. The emulated EEPROM is way how to keep high number available erase/write cycles at reasonable small chip silicon area.

Please look at attached file with the simple overview about emulated EEPROM at S12XE and example codes.

Note: When EEEPROM is partitioned, it is important to check whether partitioning was successfully finished or not. You may run Partition command, wait for the finish, check status bits and signalize successful partitioning (or write some flag into flash). Optionally, you may check the last sector header whether D-Flash was already formatted (The DFPART and ERPART values are programmed prior D-Flash formating). For example:

if(*(unsigned int *far)0x107F00 == 0xFFFF) err = FORMAT_ERROR; //Was D-Flash correctly formatted?

                                                                 //err signalize format error

                                                                 //partitioning was interrupted

I hope it helps you.

Have a great day,
Radek

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