E128 ATD correct sequence for reading results

[EagleBeak]

Greetings,

I'm a bit confused by the explanation of the ATD registers in the data sheet for the MC9S12E128.

Have scaled the program down to scanning only two channels.

ATDCTL5:

DJM  = 1

DSGN = 0

SCAN = 1

MULT = 1

CA, CB, CC, CD = 0

ATDCTL3:

Conversion length is set to 2. Does this mean that each conversion sequence will sample PAD0, then PAD1 then repeat the sequence on the next pass without any manual changing of Analog Input Channel Select code of ATDCTL5?

I need to know the correct sequence of events for reading the result registers.

My original sequence of instructions caused me to always read PAD0 on all channels. Then I stuck in another read of the ATDSTAT0 register before reading the result register for PAD1 to see if the conversion channel was incrementing, though it was not, the reads became correct.

Does this mean I need to read ATDSTAT0 before polling the ccf flag for the next channel. Below is my sequence or do I even need to check the individual ccfs in continuous SCAN mode.

1. Read ATDSTAT0 to see if scf (bit 7) is set,

2. Read PAD0 if the appropriate ccf in ATDSTAT1 is set.

3. Read ATDSTAT0 lower 4 bits (debug) to see if the conversion channel increments.

4. Poll PAD1's ccf until it becomes set, then read the result register.

This worked but I don't understand why. If ATDSTAT0 scf is set, wouldn't that mean that all the channels have been scanned and the results are ALL ready to read?

Thanks,

Eagle Beak

[blood]

Have you set ATDCTL1 to wrap after reading AN1? What have you set in ATDCTL2 and ATDCTL4?

From what I understand if you have set it for a conversion length of 2 and to wrap after reading AN1 then ATDDR0 should always contain the result for AN0 and ATDDR1 should contain the result for AN1. You should not need to look at any of the flags when set for SCAN and MULT.

You dont have ETRIGE in ATDCTL2 set do you as that will stop the continous scan.

[EagleBeak]

Well here is a perfect example of why I'm saying  the data sheet is confusing. I am working from the data sheet MC9SE128V1 and it clearly states that ATDCTL0 and ATDCTL1 are for factory use only, you will read only zeroes from them and you cannot write to them. However in other register explanations it makes reference to the wrap around function as though you can use it.

Are you saying you have actually done this?

Thanks for the input.

E. Beak

[blood]

I actually use the E256 which does have these in its datasheet. I have had a quick look at the datasheet for the E128 and see what you mean. If you also look at the register definitions on page 36 it shows the registers with their bits and has a note on page 38 that the wrap bits are available in V04 of ATD10B16C. The datasheet is for V02 of ATD10B16C.

I would suggest you send a support request to freescale with the mask of your chips to find out if they do have V04 of ATD10B16C.

Or you could try writing 0x01 to ATDCTL0 and see if that helps. A value of 0x01 should cause it to wrap after AN1.

You have set ADPU in ATDCTL2 as well havent you?

[EagleBeak]

Yes on ATDCTLR2. I have the ADPU and AFFC flags set.  Normal ATD functionality and ATD Fast Flag Clear All.

Good advice on checking with Freescale because the document I have pertains to ATD10B16CV2.

I will try writing to ATDCTLR1 then examine it with the emulator.

So theoretically, should I be able to check the scf bit of the ATDSTAT0 to be 1, then read each individual result register without any doing anything else IF, I can implement the wrap around on this chip?

What is working now is, I do a dummy read of ATDSTAT0 between reading each successive result register, which I got to through hacking. It's bumping some state machine.

Thanks for your help.

E. Beak

[blood]

I dont use any of the flags. I just set it for continous conversion (SCAN) and multi channel (MULT). Then when I want to I just read the result register.

It sounds like your ATD may not be running in continous conversion.

Sorry I cant help you with how the flags should be used.

[EagleBeak]

blood,

I did as you suggested and put in a service request to Freescale. They said my mask set should have the WRAP register available.

I like the idea of being able to just read the result register and will post my results as soon as I get a chance to try it.

Thanks,

E. Beak