Diode action

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Diode action

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Frank6
Contributor I

Hi,all

We have two hypotheses about the mechanism by which diodes prevent overvoltage

 

1. Monitor VDDC voltage to regulate BCTLC current through the internal mechanism of the chip, so as to keep VDDC voltage around 5V. In the process of up and down, capacitor discharge, VDDC voltage pulsation too large, regulation failure. The role of the diode is to connect the VDDC and VDDA, so that the overvoltage is consumed through the INTERNAL CIRCUIT of the VDDA

 

2. The voltage regulator tube is used in the VDDC, but it may fail in the process of frequent power fluctuation, so it is connected to the VDDA. When the regulator tube at the VDDC fails, the regulator tube at the VDDA can be borrowed

 

Do you have any explanation about this part? If so, please tell us. Thank you

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Frank6
Contributor I

When we do not add a diode between VDDC and VDDA, VDDC may reach 13.5V during the plug-in process, which is the same as the power supply voltage. Is 13.5V caused by the failure of the internal adjustment mechanism of the chip? Then VDDC is stable at 5V What is the mechanism and why overvoltage will make it fail? If I can explain it, we would be very grateful

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Frank,

It is explained in the RM,

danielmartynek_0-1603709465033.png

it basically clamps the VDDC over-voltage that could be generated during power-up to VDDA (which should be connected to VDDX on the PCB) and the energy gets dissipated in the VDDA/VDDX cuircuit.

 

Regards,

Daniel

 

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Frank6
Contributor I

When we do not add a diode between VDDC and VDDA, VDDC may reach 13.5V during the plug-in process, which is the same as the power supply voltage. Is 13.5V caused by the failure of the internal adjustment mechanism of the chip? Then VDDC is stable at 5V What is the mechanism and why overvoltage will make it fail? If I can explain it, we would be very grateful

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Frank,

The reason has been already explained.

The VDDC voltage must not exceed 6V (Absolute maximum ratings).

danielmartynek_0-1603783779573.png

You wrote that you measure 13.5V VDDC in your set up.

Can you share a schematic of the board?

What PNP do you use? What is the gain of the PNP?

AN5207 S12ZVM Hardware Design Guidelines recommends two PNPs.

 

Thank you,

BR, Daniel

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