Hi all~
I want to know the registers about the result and completion, when ADC's conversion is finished, using Port L.
Port L input is connected to ADC internal channel 5, please see Table 1-13 in the Reference Manual.
While PTAL register is used to configure which HVI pin is connected to ADC internal channel 5.
I know that the CCF bits of ATDSTAT and ATDDR0~5 registers present the completion flag and result value register for PAD0~5 port, not Port L.
I would like to know the conversion result and completion registers and How to use sample source for Port L.
Where are the result and conversion completion registers for Port L ?
Please advise me.
Thank you.
ATD module could be configured for three basic measurement:
Result from ATD conversion are stored into ATDDR0..ATDDRx register(s).
There isn’t any direct connection between port AD numbering and ATDDR result register numbering.
When FIFO=0 (default), sequence results of measurement are stored into ATDDR0, ATDDR1,….ATDDRn registers.
For example: we setup ATD to measure one sample at multiple channels (MULT=1), number of channels =4 (S8C=0, S4C=1, S2C=0, S1C=0), and we starts from Internal_2 channel (ATDCTL5=0x58). After that, Internal_2 result will be stored into ATDDR0 and Internal_5 result will be stored into ATDDR3.
If we want measure voltage at all HVI inputs (Internal_5 channel), we cannot use configuration for multiple channels. We have to use single conversion or multiple samples at one channel (MULT=0). So, only way is set PTAL1, PTAL0 bits, write ATDCTL5, wait for result, change PTAL1, PTAL0 bits, write ATDCTL5, ....
Thank you for your comments.
Do you have any test or sample code about this for S12VR using Port L and ADC.
In general, It seems to be as below
//Start the conversion
ATD0CTL5 = SetVal; //Start conversion
// Wait for AD conversion complete
while (0 == ATD0STAT0_SCF);
//Return the result
RetVal = ATD0DR0;