CAN Wake up not working in MC9S12XEG384

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CAN Wake up not working in MC9S12XEG384

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vijay4
Contributor I

After going to CAN sleep mode, I'm unable to Wake_up by using, wakeup register. 

                                    Thankyou,

                                    vijay.

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3 Replies

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lama
NXP TechSupport
NXP TechSupport

Hi,

it is not clear what you are talking about.

"Wake up by register:....what does it mean?..

a bit - WUPE
Wake-Up Enable — This configuration bit allows the MSCAN to restart from sleep mode or from power down
mode (entered from sleep) when traffic on CAN is detected (see Section 16.4.5.5, “MSCAN Sleep Mode”). This
bit must be configured before sleep mode entry for the selected function to take effect.
0 Wake-up disabled — The MSCAN ignores traffic on CAN
1 Wake-up enabled — The MSCAN is able to restart

Note: 3. The CPU has to make sure that the WUPE register and the WUPIE wake-up interrupt enable register (see Section 16.3.2.6, “MSCAN Receiver Interrupt Enable Register (CANRIER)) is enabled, if the recovery mechanism from stop or wait is required.

a bit - WUPM
Wake-Up Mode — If WUPE in CANCTL0 is enabled, this bit defines whether the integrated low-pass filter is
applied to protect the MSCAN from spurious wake-up (see Section 16.4.5.5, “MSCAN Sleep Mode”).
0 MSCAN wakes up on any dominant level on the CAN bus
1 MSCAN wakes up only in case of a dominant pulse on the CAN bus that has a length of Twup

a bit - WUPIF
Wake-Up Interrupt Flag — If the MSCAN detects CAN bus activity while in sleep mode (see Section 16.4.5.5,
“MSCAN Sleep Mode,”) and WUPE = 1 in CANTCTL0 (see Section 16.3.2.1, “MSCAN Control Register 0
(CANCTL0)”), the module will set WUPIF. If not masked, a wake-up interrupt is pending while this flag is set.
0 No wake-up activity observed while in sleep mode
1 MSCAN detected activity on the CAN bus and requested wake-up

So, registers are responsible for setup only. For wake up the traffic on CAN bus with and proper wake up setup are responsible.

best regards,

Ladislav

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aaronlee
Contributor V

Hi Ladislav,

I have the same issue.

CAN0RIER_WUPIE=1;     // 0x7d ==> 0xfd Modify OK
CAN0CTL1_WUPM=1;     // 0x80 ==> 0x84 Modify Failure
CAN0RFLG_WUPIF=1;    // 0x08 ==> 0x88 Modify Failure
CAN0CTL0_WUPE=1;      // 0x94 ==> 0x14 Already =1

CAN1_SetSleepRequest();
// Cpu_SetWaitMode();
Cpu_SetStopMode();

The following registers modify failure.

CAN0CTL1_WUPM=1; 
CAN0RFLG_WUPIF=1;

Do you have any recommend?

BR, Aaron

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kef2
Senior Contributor IV

WUPM bit is write protected while INITAK == 0.

CAN0RLG has more than one flag clearable writing one to it. So the following your code line is wrong and will clear as well CSCIF, OVRIF and RXF and will lead to data loss if done while RXF==1

   CAN0RFLG_WUPIF=1;

Please use correct flag clearing sequence:

   CAN0RFLG= CANRFLG_WUPIF_MASK;

Edward

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