I carefully composed a question here, and evidently my session timed out. I apologize for my curtness now, but I want to get the question out before I lose fifteen minutes of work and my train of thought. 
How do I identify exactly where in memory the various functional block control registers are for my development board's 9S12A256? The Device User Guide doesn't seem to say, and the functional block descriptions all use "abstract" addresses. The manufacturer of the development board is, so far, unresponsive.
Say I've got ATD0 registers starting at x0080-009xx.
Where will ATD1 be?
I have similar problems locating the CRG and other more sophisticated timer register locations. Is there likely to be a version number on the chip that will tell me what the map is? Is there some configuration info I can read from a known location to tell me (sort of like the MMC)?
Or, say, is a complete detailed 0000:0200 memory map sitting somewhere in your PDFs and I missed it?
Thanks for your help.
How do I identify exactly where in memory the various functional block control registers are for my development board's 9S12A256? The Device User Guide doesn't seem to say, and the functional block descriptions all use "abstract" addresses. The manufacturer of the development board is, so far, unresponsive.
Say I've got ATD0 registers starting at x0080-009xx.
Where will ATD1 be?
I have similar problems locating the CRG and other more sophisticated timer register locations. Is there likely to be a version number on the chip that will tell me what the map is? Is there some configuration info I can read from a known location to tell me (sort of like the MMC)?
Or, say, is a complete detailed 0000:0200 memory map sitting somewhere in your PDFs and I missed it?
Thanks for your help.
Thanks! That rocks excellently (or you do) . I found it right away in the v3.07 Device User Guide at P. 27 et seq.
I wasn't expecting either the loose format or the presence in the introduction, though it's a great place. The old 2002-era docs were written in such a way that the only register-assignment absolute address stuff I could find was all in one tight (pseudo-spreadsheet) table, and I think it was in an appendix, and most of the peripheral block stuff there was just marked as white zones labeled "peripheral block registers".
This is the real deal. Once again, please accept my sincere thanks. I finally feel as if I have a chance to get some work done. The proto board vendor will hear about this from me. They need to improve their pointers to current info, and especially to stuff like this. It's hard to wade through hundreds of PDF pages, especially when you expect the format to be different from what it turns out to be.
Now for my next question, about ADCs.... And then, about the modular timer, and then....
. I found it right away in the v3.07 Device User Guide at P. 27 et seq.I wasn't expecting either the loose format or the presence in the introduction, though it's a great place. The old 2002-era docs were written in such a way that the only register-assignment absolute address stuff I could find was all in one tight (pseudo-spreadsheet) table, and I think it was in an appendix, and most of the peripheral block stuff there was just marked as white zones labeled "peripheral block registers".
This is the real deal. Once again, please accept my sincere thanks. I finally feel as if I have a chance to get some work done. The proto board vendor will hear about this from me. They need to improve their pointers to current info, and especially to stuff like this. It's hard to wade through hundreds of PDF pages, especially when you expect the format to be different from what it turns out to be.
Now for my next question, about ADCs.... And then, about the modular timer, and then....
