timing for the T1040 vs the T2080 and P2041

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timing for the T1040 vs the T2080 and P2041

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hv
Contributor II

we're doing a benchmark study where we run the same application on a T1040, T2080 and P2041.  The timing for the T1040 is about 2x or 3x slower than the T2080 and P2041.  We're not sure why that is...we expect the T1040 to be faster than the P2041!

Thanks!

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mathiasparnaude
Contributor III

What kind of benchmark? Which timing? Which OS do you use?

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LPP
NXP Employee
NXP Employee

>What kind of benchmark?

http://www.eembc.org/coremark/

>Which timing? Which OS do you use?

T2080QDS

  SMP Linux 3.12 64bit, 32bit user space

  gcc-4.8.1, eglibc-2.15

  SDK v1.7

  Core/CCB/DDR/FMan: 1800/600/1866/700

T1040RDB

  SMP Linux 3.8.13 32 and 64bit

  gcc-4.7.3, eglibc-2.15, binutils-2.23.1

  Core/CCB/DDR/Fman: 1400/600/1600/600 MHz

P2040RDB

  SMP Linux 3.0.6 (36-bit physical)

  CodeSourcery Sourcery G++ Lite 2011.03 (gcc 4.5.2), glibc 2.13

  Core/CCB/DDR/FMan: 1200/600/1200/500


Have a great day,
Pavel

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hv
Contributor II

What kind of benchmark? We have an app code that runs on an in-house OS and GHS compiler. We use time base register to measure how long the code runs on each processor: P2041, T1040 and T2080. We were surprised that the T1040 seems to be 2 or 3 times slower than the T2080 and even slower than the P2041! Our assumption now is the T1040 has the smallest cache…

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LPP
NXP Employee
NXP Employee

The scores depend on the test code, platform configuration, software environment, libraries, compiler and compiler optimization used.

I've got some Coremark numbers from Freescale

Coremark/MHz for 1 thread, Linux core/user space

T2080 e6500  1800/600/1866 64b/32b    4.32

P2041 e500mc 1200/600/1200 32b/32b    3.71

T1040 e5500  1400/600/1600 32b/32b    3.95

T1040 e5500  1400/600/1600 64b/64b    3.45

T2080 is more effective because of it's e6500 core but the difference is not as large as in your test.

If your code is small, you can check the assembler listings. I think the reason of your observation is that compilers may generate different instruction sequences for these processors.


Have a great day,
Pavel

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