I'm looking at the performance monitor event selection in the e5500 for L2 cache hits/misses.
The event selection includes:
Com:113 L2 cache data hits
Com:115 L2 cache instruction hits
I don't see events for L2 cache misses?
Thanks!
Hello HV HVO,
You may use L2 cache accesses minus L2 hit cache accesses to estimate. There is Backside L2 Cache Data Miss and Backside L2 Cache Instruction hit ratio in Scenario tool.
Have a great day,
Lunmin
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