Hi,
Our bootup of the p1022 is crash every time.
we recognize access to incorrect address location, not assigned to any memory target.
The bootup fail on address 0x20090000 which is inside the DDR MMU address space but out of the actual DDR size.
From the init file we running for the bootup I see the followed DDR address space definition:
# LAWAR11
# bit 0 = 1 - enable window
# bit 7-11 = 01111 - DDR
# bit 26 - 31 = 011110 2G - size
mem [CCSR 0xd70] = 0x80f0001e
# define 1GB TLB1 entry 1: 0x00000000 - 0x3FFFFFFF; DDR, cacheable, not guarded
reg ${CAM_GROUP}L2MMU_CAM1 = 0xA0007FC41C0800000000000000000001
#CS0_BNDS
mem [CCSR 0x2000] = 0x0000001F
#CS0_CNFG
mem [CCSR 0x2080] = 0x80014202
could you see problems with the ddr address space definition?
Do I need to change the DDR MMU address space to 512 M ?
could you have advise how to proceed?
Zeev Gerber
Your settings are incorrect of course, even in the DDR controller:.
--------------------------------------------------------------
#CS0_BNDS
mem [CCSR 0x2000] = 0x0000001F
this corresponds to 512MB memory size.
---------------------------------------------------------------
#CS0_CNFG
mem [CCSR 0x2080] = 0x80014202
This corresponds to 1GB memory size assuming 64-bit DDR bus.
---------------------------------------------------------------
So it is unclear what is correct memory size in your case, but you need to set all LAWAR, MMU and DDR controller to the same value.
Regards,
Bulat
Hi,
# DDR_SDRAM_CFG
mem [CCSR 0x2110] = 0x470c0008
we are working with 32-bit DDR bus, so we have 512MB memory size.
When we configure the CS0 to 256MB memory size the bootup stop crash.
we are working now on half of our ddr memory space.
Are the DRAM controller support 512MB memory size when working with 32-bit DDR bus?
Pls. advise
Ok, so 512MB is correct memory size. Yes, it is supported with 32-bit DDR bus. Now you need to set DDR's LAWAR and MMU to the same size.