ls1020a RGMII interface not working

[ser_fr]

Hi, I am using ls1020a with two ksz9031rnxi PHYs connecting to EC1, EC2 in RGMII mode.  The input 125 MGz clock is present on EC1_GTX_CLK125 and on EC2_GTX_CLK125. I checked by scope, that there is no transmission clocks on EC1_GTX_CLK and EC2_GTX_CLK. The friquency on this pins is about 900 kGz. MDIO is working and present link status of the PHYs in linux. I think, that eTSEC takes the input 125 MGz from EC3_GTX_CLK125 for all EC. Can you help me to configure interfaces in u_boot and dts?

[ufedor]

Please check  the SCFG_ETSECCMCR initialization setting, for example in u-boot/board/freescale/ls1021atwr/ls1021atwr.c it is:

#ifdef CONFIG_TSEC_ENET
    /* clear BD & FR bits for BE BD's and frame data */
    clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
    out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
#endif

I.e. the clock is taken from the EC3_GTX_CLK125.
In the described case it is needed to change the "SCFG_ETSECCMCR_GE2_CLK125" to "SCFG_ETSECCMCR_GE0_CLK125" or "SCFG_ETSECCMCR_GE1_CLK125".