I have doubt in setting RCW value for bits MEM_PLL_RAT(10-15) which is used to select DDR Clock. In datasheet in table 159 it is mentioned as the ratio between DDR datarate: DDRCLK ratio, but in Reference Manual It is mentioned as the ratio between DDR PLL:SYSCLK Ratio.
My Core Freq is 1.6GHz, Platform Freq is 400MHz, and DDR Data rate need to 1600MT/s. Kindly help me what value should i keep in MEM_PLL_RAT(10-15) RCW setting?
I'm clear that it can be supplied with either DDRCLK or DIFF_SYSCLK/DIFF_SYSCLK_B, but the doubt is whether to consider Reference Manual or the Datasheet for selecting DDR PLL Clock frequency.
I need DDR datarate of 1600MT/s, My SYSCLK freq is 66.67MHz and DDRCLK input is 66.67MHz (Both are Single Ended Input). Kindly suggest me the Ratio Value for the MEM_PLL_RAT.
Rate=1600/66.7=24
Thank you.
Either DDRCLK or DIFF_SYSCLK/DIFF_SYSCLK_B could be used as DDR PLL clock - please refer to the QorIQ LS1043A Reference Manual, Table 4-14. RCW Field Descriptions.