Uboot strange boot log on custom P1020 board

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Uboot strange boot log on custom P1020 board

1,605 Views
fjullien
Contributor II

Hi,

I justed powered on our new custom P1020 board. The DDR2 works fine, the nor flash too.

Our design is pretty much a copy of the P2020RDB.

As a quick test, I took the P1020RDB uboot at flash it.

This is what I get:

U-

o B

:5Ut- Bo20o1t3 2.0041-3.000247-04-0g2a7471-dg4a75d1 d(45Mady  (M31a y2 30113  20- 1135 -:5 21:5:595)2

9

)

0eU0:  P1020CPU1:  P1020, Version, : V1e.rs1,i o(n:0x 810.1e4,0 0(011x)8

EC40o0r1e:1)

025Co00re,:  V erEs5i00o,n: V e5.r1si, o(n:0x 85.0211, 20(50x1)8

C 1C2l0oc51k )

oCnfliogcukr aCotinofnig:ura

  io n  :

:       CPU0:800  MCHzP,U0 C:P80U01: 8 M00H z, M HCPzU, 1

B80  0    M  H zC, C

6:2  6 6.  6 67 C CMHB:z2,

D6.66  7  M H  z,

DR:2  00      MH zD DR(4:02000 M T /MHs zd a(4ta0 0r MatTe/)s  (dAastayn crhatroen)o (usA)s,yn LcBhrC:o1n6ou.6s6)7,  MLHBzC:

cL61.6: 6 7  M DH-z

kaLc1he:   32   Dk-B ceacnhabe l3ed2


.....

trap at PC: 1fe2dd8c, SR: 1000, vector=400

NIP: 1FE2DD8C XER: 20000000 LR: 1FF3079C REGS: 1fe2db60 TRAP: 0400 DAR: 4FF44BFC

MSR: 00001000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 1FE2DD78 1FE2DB50 1FE2DF18 1FE2DB60 0000000A 00000001 FFFFFFFF 00000020

GPR08: FFFFFFFE 00000020 00000020 1FE2DC50 1FF6CD68 FBC18059 00000000 2FFB0000

GPR16: 72841D00 84864340 E6020954 17AA5911 00001000 1FE2DD8C 00000000 1FF3109C

GPR24: 1FF36AB4 6E580B00 1FE2DF18 1FF825F4 1FF8C98C 1FE2DC60 00000000 EA342E40

Call backtrace:

1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C

1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C

1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C

1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C

1FF3109C 1FF3109C 1FF3109C 1FF3109C 1FF3109C

Exception in kernel pc 1fe2dd8c signal 0

### ERROR ### Please RESET the board ###

Bad trap at PC: 1ff36e34, SR: 21200, vector=d00

NIP: 1FF36E34 XER: 00000000 LR: 1FF35664 REGS: 1fe2dd90 TRAP: 0d00 DAR: 4FF44BFC

MSR: 00021200 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 00000000 1FE2DE80 1FE2DF18 FFFFF000 1FF32FFC 00000000 FFFFFFFC 00000000

GPR08: 07084800 4FF44BE8 07081800 10000000 FFFFF000 002315A2 00000000 2FFB0000

GPR16: 2D51C145 26916134 702009E4 680FB018 00001000 1FE2DD80 00000000 1FF3109C

GPR24: 1FF36AB4 0C156201 07081800 00000000 00000001 1FFFF000 1FF9362C 8001FFFF

Call backtrace:

1FF35570 1FF35E8C 1FF38338 1FF3164C

Exception in kernel pc 1ff36e34 signal 0

### ERROR ### Please RESET the board ###

It is like uboot is executed on both cores !?

Do you have an idea ?

Franck.

3 Replies

124 Views
fjullien
Contributor II

Putting cfg_cpu1_boot low ("e500 core 0 is allowed to boot without waiting for configuration by an external master, while e500 core 1 is prevented from booting until configured by an external master or the other core.") make it works.

I didn't pay attention to that .....On the P2020RDB, cfg_cpu1_boot is pulled high via a resistor BUT it also goes to the CPLD. This one put cfg_cpu1_boot low.....

Problem solved !

124 Views
marius_grigoras
NXP Employee
NXP Employee

Hi Franck,

Most likely all new hw changes for your custom board are not fitting with the old u-boot settings. Please note that u-boot runs all the time only on the first core (core0).

At first sight, the u-boot is trying to load the Linux image, but you get some kernel panics (you can see the errors in the trace log).

Regards,

Marius

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124 Views
fjullien
Contributor II

Well, I would have expected to get at least the first lines of the log correct....

Adding some #define DEBUG, I can see:

....

d tes fRoers eBrovairngd  I7n2 foB yatet:s  1fofer2 dBofba8r

  IRensfoer vatin:g 1 1f6e20 dBfby8te

lR feosrer Gvliongba l1 60Da tBayt aets: f 1ofre G2dlfo1ba8

  SDattaack a tP:oi 1nfteer2d fa1t:8

oiSfet2adckf0 0P

  nNetwer S tatac:k 1 Pfoe2indtf0e0r

iNs:ew  1Sfeta2cdkf0 P0o

nter is: 1fe2df00

Now running in RAM - U-Boot at: 1ff30000

Now running in RAM - U-Boot at: 4ff44e24

.....

BR,

Franck.

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