U-Boot Ethernet for 10G SFP+

[smiller2]

I have a new design using the LS1046A.  Due to parts availability, the 10G Ethernet was done with an SFP+ Cage because all other parts were extremely long lead time.    This 10G Ethernet is the only port on the board.   I tried basing eth.c on the LS1046ARDB .   I also tried basing the code on the LS1043ARB since other posts recommended it.    Finally,  I also built the U-Boot for the LS1046ARDB and used that instead of my boards fip_uboot.bin.   All give the same result.   I get a printout of

Fman1: Data at 00000000f7a50bf0 is not a firmware

After this printout, the message is "No ethernet found. "

Into the QSPI,  I am only programming the bl2_qspi.pbl and the fip_uboot.bin.   I am assuming that any driver needed is bundled into the binary.    Is that true?   Or do I need to program separate files for drivers?

Is there environment variables that I need to set before it will load the Ethernet?    For example ethprime=FM1@DTSEC3 .   Should that be something different, or the problem before it even gets there?

Given that the SFP+ Cage is a generic removeable module,  I do not have any idea what driver the eth.c should be attempting to call. 

Unfortunately, I only have my new board as a test platform.   I wanted a LS1046ARDB as a test platform, but none have been available for purchase during our development phase. 

Thanks.

[smiller2]

Thank you.  

I loaded the fman microcode and I no longer get the firmware error.   However, I am still having problems getting a connection.   Below is my eth.c code.

********************************

int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_FMAN_ENET
int i;
struct memac_mdio_info dtsec_mdio_info;
struct memac_mdio_info tgec_mdio_info;
struct mii_dev *dev;
u32 srds_s1;
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
srds_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;

dtsec_mdio_info.regs =
(struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;

dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;

tgec_mdio_info.regs =
(struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR;
tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME;

/* Register the 10G MDIO bus */
fm_memac_mdio_init(bis, &tgec_mdio_info);

switch (srds_s1) {
case 0x1133:
break;
default:
printf("Invalid SerDes protocol 0x%x for Neosem HP IBIR\n",
srds_s1);
break;
}

dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++)
fm_info_set_mdio(i, dev);

/* XFI on lane A, MAC 9 */
fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
fm_info_set_mdio(FM1_10GEC1, dev);
cpu_eth_init(bis);
#endif
return pci_eth_init(bis);
}

********************************

When I run it, the console output is:

*******************************************

SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
Fman1: Uploading microcode version 108.4.9
Could not get PHY for FM_TGEC_MDIO: addr 0
Failed to connect

PCIe1: pcie@3400000 Root Complex: no link
PCIe2: pcie@3500000 Root Complex: no link
PCIe3: pcie@3600000 Root Complex: no link
FM1@DTSEC5
Error: FM1@DTSEC5 address not set.
, FM1@DTSEC6
Error: FM1@DTSEC6 address not set.
, FM1@TGEC1
Error: FM1@TGEC1 address not set.
, FM1@TGEC2
Error: FM1@TGEC2 address not set.

**********************************************

=> mdio list
FM_TGEC_MDIO:

I saw a post for LS1043A about SFP+ modules:

https://community.nxp.com/t5/Layerscape/LS1043A-RGW-B-10G-optical/td-p/727583

However, I could not figure out how to apply that to my case. 

I looked for the code for fman, so that I could try to enable more printouts, but I could only find binaries, so I guess the source is restricted.

Questions:

1.  What is incorrect or missing from by eth.c?

2.  Are there registers within the LS1046A that I could dump with CodeWarrior TAP to get information on what is wrong?  

Thanks.

[ufedor]

> Into the QSPI, I am only programming the bl2_qspi.pbl and the fip_uboot.bin.

You have to prepare composite firmware image so it will contain FMan microcode at offset 0x900000 - refer to the Layerscape Software Development Kit User Guide:

https://docs.nxp.com/bundle/GUID-3FFCCD77-5220-414D-8664-09E6FB1B02C6/page/GUID-D9A90107-3335-4BDB-8...

The FMan microcode offset is specified in u-boot/include/configs/ls1046a_common.h:

https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/include/configs/ls1046a_co...

Composite firmware image:

https://docs.nxp.com/bundle/GUID-3FFCCD77-5220-414D-8664-09E6FB1B02C6/page/GUID-EB58F77F-97D9-459A-A...

FMan microcode:

https://github.com/NXP/qoriq-fm-ucode