T4240 XFI at 1Gbps rate

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T4240 XFI at 1Gbps rate

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sedat_altun
Contributor III

mac_problem.png

We have a custom board with T4240 SoC .  The custom board 10G mac is connected to a marvell10g  PHY via XFI and the PHY is connected to a host over a RJ-45 cable and depicted in the above figure.  We want to use this port both at 10Gbps and 1Gbps speed.

The problem is we are seeing lost packets  when the link speed between our board and the remote host is 1Gbps. When we connect a  host with 1Gbps link speed to our custom board we are seeing lost packets. We are pinging from our board to the host and we saw lost packets , all the packets are not received by the host. All the packets  that are successfully transmitted from MAC are not exiting from the phy chip of our board , there are lost packets  at phy chip when it is link speed between the medium is 1Gbps.

But if we connect our board to a host with 10Gbps link speed there is no any lost packets.

The link speed between the MAC and phy is xfi and has 10Gbps speed, but when a  host with 1Gbps link speed is connected to our board there must be a flow control in mac, in other words mac rate has to be decreased. But we could not find any solution about how to adapt the 10G mac to a low 1G rate to decrease the mac speed when the link between the mac and the phy is xfi.  Or in other words Is it possible for the 10G mac of t4240  to operate at a 1Gbps rate despite the xfi conenction between the MAC and PHY chip?

Thank you 

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ufedor
NXP Employee
NXP Employee

You wrote:

we dont have to do any configuration of mac

Correct.

> 10G mac can operate at 1G rates.

The XFI lane always operates at 10G - it is the PHY who should send pause frames to the MAC to regulate the data rate. T4240 SoC does no rate adaptation.

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sedat_altun
Contributor III

Thank you very much for your reply.

As I know for flow control there is no pause frame between mac and phy,  pause frames are between two macs, for flow between mac and phy  there is another mechanism xfi like rate adapt is used. But this mechanism is not well defined for many phy manufacturers, you must have NDA for getting such information.

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ufedor
NXP Employee
NXP Employee

there is another mechanism xfi like rate adapt is used

T4240 does not support this.

AQR105 PHY from Aquantia supports lower speeds over XFI, the PHY can send PAUSE frames to the MAC to regulate the data rate.

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sedat_altun
Contributor III

Thank you very much for your reply.

I have a last question:  if we could successfully send pause frames from phy to mac which dpaa component (fman,qman..) or ip stack will be informed in order to stop packet enqueing to mac. Is  there any  feedback mechanism in dpaa architecture  to stop transmission of  packets when a pause frame is received from phy?

Best regards

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ufedor
NXP Employee
NXP Employee

Please refer to the NXP Linux SDK Documentation:

DPAA 1.x Devices

Submit Form 

Ethernet

Submit Form 

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ufedor
NXP Employee
NXP Employee

XFI connection does not require any T4240 XFI reconfiguration to change speeds because the PHY should do the work.

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sedat_altun
Contributor III

Thank you very much for your reply,

Yes the speed between the host and the phy is 1Gbps and at the same time the speed between 10G mac and phy is still 10G despite the phy switches its port speed to 1G.

And also in dpaa drivers the link speed is automatically set to 10G if the serdes type between the phy and the mac is xfi.

I think there must be an autonegotiation between the phy and mac if the phy  external host side speed switches from 10G to 1G rate.

So do you mean if the mac side of the phy (PCS layer) switches to 1G rate MAC is automatically switch to 1G rate we dont have to do any configuration of mac, and also  if I understand correctly 10G mac can operate at 1G rates.

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ufedor
NXP Employee
NXP Employee

You wrote:

we dont have to do any configuration of mac

Correct.

> 10G mac can operate at 1G rates.

The XFI lane always operates at 10G - it is the PHY who should send pause frames to the MAC to regulate the data rate. T4240 SoC does no rate adaptation.

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sedat_altun
Contributor III
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