T2080QDS RCW using more than 2 SGMII

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T2080QDS RCW using more than 2 SGMII

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douglasmcintosh
Contributor I

We are having trouble using a RCW that configures for more than just 2 SGMII.

The T2080 continuously resets.

With the default 2 RGMII and 2SGMII, and also without the RGMII, it works fine.

However whenever we build a RCW with more than the 2 SGMII, it fails.

We have a Freescale 4xSGMII riser cards installed into slot 3 PCIe.

More info available if needed.

Doug

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alexander_yakov
NXP Employee
NXP Employee

What do you mean by "The T2080 continuously resets"? Do you mean you see HRESET is released and than asserted back? Do you see any attempts to load boot code (chip select assertions) after HRESET is released?


Have a great day,
Alexander

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douglasmcintosh
Contributor I

Hi Alexander,

We’ve made some minor progress, but still having trouble.

We discovered that we needed to set the SERDES 1 PLL to 100Mhz, as the QDS defaults to 125.

This is in sw4[1:2]

Setting to ‘00’ allows ths RCW to be consumed without failure, but is somehow now affecting our DDR config.

We can execute code from flash, but cannot access DDR. If we leave the sw4[1:2] at ‘10’ and load a good RCW, then the DDR config succeeds.

Doug

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