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The SJZ1000 has multiplexed data/address bus AD7-AD0. As an 8-bit data port it must reside on LAD[0:7] of the P2020 eLBC. The P2020 also provides both data and address on the LAD[0:15]. However the LAD[0:7] provide most significant 8 bits of 32-bit address. The LAD[0] provides the most significant bit of 8-bit data and 32-bit address. So connecting P2020 LAD[0:7] to the AD[7:0] is not so good idea. As workaround for such connection you can use the UPM for access control and provide address on the LAD[0:7] from the UPM’s MAR register. I.e. first your driver writes to the MAR value which set required address on the LAD[3:7] and then reads or writes to the dummy address which runs UPM access. The UPM LGPL[] signals can provides required control signals for the CAN controller interface.
You also can use an external 8-bit multiplexor which will provide address from P2020 LA[24:31] and data from/to the LAD[0:7].
There is P1010 in the QorIQ P-series family which has in-built FlexCAN controllers (revision 2.0B). The ARM core based QorIQ family includes LS1021A and LS1022A which also have in-built CAN controllers.
At last there are CAN controllers with SPI interface (f.e. MCP2515). Such controllers can be connected to the P2020 SPI interface.
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