Routing Pulse Out to 1588 Test Header Pin LS1046ARDB

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Routing Pulse Out to 1588 Test Header Pin LS1046ARDB

Jump to solution
2,557 Views
kien_tran
Contributor II

Hello,

After installing the Layerscape Software Development Kit, I've been using this guide to enable PPS leveraging my PTP hardware clock. Now I want to know if it is possible to route this PPS signal to hardware pin on the board (maybe the 1588 test header pins) so that I could hook up a scope and measure the delay. Does anyone have a guide on how to do this?

I've read around and notice that there are documentation about leveraging the reset configuration words (notably RCW[EC2]) to enable the use of this 1588 test header but I have not found any documentation regarding how to do this.

Any help would be appreciated!

1 Solution
2,178 Views
ufedor
NXP Employee
NXP Employee

To expose the IEEE1588 signals externally it is required to set RCW[EC2]=0b10 (2) - refer to the QorIQ LS1046A Reference Manual, 4.4.6.1 RCW Field Definitions and 3.4.9 Ethernet controller 2, GPIO3, FTM2, and IEEE1588 signal multiplexing

The LS1046ARDB RCW sources could be found in the CodeAurora repository:

ls1046ardb - qoriq-components/rcw - Reset Config Word (RCW) Tree 

Required additional line is:

EC2=2

New firmware with updated RCW has to be built as described in the NXP LSDK:

How to build LSDK with Flexbuild 

View solution in original post

12 Replies
2,178 Views
kien_tran
Contributor II

I wanted to add a little bit of information. It looks like it requires the EC2=2 entry in the rcw files as well as a manipulation for the CPLD registers when I got the software running. It appears I had to change the REG_RGMII_1588_SEL, EC2_SEL_EN, and 1588_CLK_EN register to get the pulse out to appear.

Attaching the code I used to poke at those registers

2,179 Views
ufedor
NXP Employee
NXP Employee

To expose the IEEE1588 signals externally it is required to set RCW[EC2]=0b10 (2) - refer to the QorIQ LS1046A Reference Manual, 4.4.6.1 RCW Field Definitions and 3.4.9 Ethernet controller 2, GPIO3, FTM2, and IEEE1588 signal multiplexing

The LS1046ARDB RCW sources could be found in the CodeAurora repository:

ls1046ardb - qoriq-components/rcw - Reset Config Word (RCW) Tree 

Required additional line is:

EC2=2

New firmware with updated RCW has to be built as described in the NXP LSDK:

How to build LSDK with Flexbuild 

2,178 Views
kien_tran
Contributor II

Hi ufedor,

Thanks for your reply.
Correct me if I am wrong, but in order to build the set the RCW using the flexbuild lsdk, I would need to edit the 

<flexbuild_dir>/packages/firmware/rcw/ls1046ardb/RR_FFSSPPH_1133_559/rcw_1800_sdboot.rcw 

 

file and add the "EC2=2" line in there, then run 

flex-builder -c atf -m ls1046ardb -b sd

to output these files:

  • bl2_emmc.pbl
  • bl2_qspi.pbl
  • bl2_qspi_sec.pbl
  • bl2_sd.pbl
  • bl2_sd_sec.pbl
  • fip_uboot.bin
  • fip_uboot_sec.bin
  • fip_uefi.bin

Once those files are generated I can run:

flex-builder -i mkfw -m ls1046ardb -b sd

 

to generate my firmware image, is this correct?

Do I need to specify the bootloader in this instance with:

flex-builder -i mkfw -m  ls1046ardb -b sd -B bl2_sd.pbl

or is that not required?

Thank you for your help!

0 Kudos
2,178 Views
ufedor
NXP Employee
NXP Employee

Correct.

The latter is not needed.

0 Kudos
2,178 Views
kien_tran
Contributor II

Hi ufedor

An update on my situation:

I have an SD card that has been setup with the Ubuntu userland created by this command:

flex-installer -b bootpartition_LS_arm64_lts_4.19.tgz -r rootfs_lsdk1909_LS_arm64_lite.tgz -f firmware_ls1046ardb_uboot_sdboot.img -d /dev/sdb

Then following your suggestion, I generated the bl2_sd.pbl and fip_uboot.bin files and uploaded it to my tftp server so that I could flash those files on to that SD card (guide 5.2.4.5). After flashing the bl2 and fip and rebooting from SD card then enabling pps with:

echo 1 > /sys/class/ptp/ptp0/pps_enable

I tested each pin on the 1588 Test Header with a scope and did not see any pulse out coming from any pins.

My first question is, is there a way to check if my bl2_sd.pbl and fip_uboot.bin contains the EC2=2 changes that was made, and if those changes really did make it into the SD card when I followed the guide on how to flash it?

Second question, is there a method to take the bl2_sd.pbl and fip_uboot.bin files that was generated and leveraging flex-build and the LSDK to generate a firmware_uboot_sd.img file so I can just use flex-installer to burn it onto my SD card instead of having to flash each file into the SD card as described above? I would prefer this if there is a solution to creating the .img file using those 2 generated files.

Thank you again for your help!

0 Kudos
2,178 Views
ufedor
NXP Employee
NXP Employee

The recommendation was to generate the LSDK composite firmware (single binary image) similar to provided at:

LSDK Open Source 

LSDK IMAGES

0 Kudos
2,178 Views
kien_tran
Contributor II

Hi ufedor

After making the changes to my rcw file and running:

 

flex-builder -c atf -m ls1046ardb -b sd

 I genereated the LSDK composite firmware with:

flex-builder -i mkfw -m ls1046ardb -b sd

Then I install the userland and the composite image onto the SD card with:

flex-installer -b bootpartition_LS_arm64_lts_4.19.tgz -r rootfs_lsdk1909_LS_arm64_lite.tgz -f firmware_ls1046ardb_uboot_sdboot.img -d /dev/sdb

 

and booted the SD card on my LS1046ardb device. However, when I enabled PPS with:

echo 1 > /sys/class/ptp/ptp1/pps_enable

I noticed that the /sys/class/pps/pps0/assert is increasing on my screen, but after attaching a scope to the 1588 test headers (pin 1), I am still unable to see any pulse out signal.

Am I missing a step or is my configuration incorrect. I have attached my rcw_1800_sdboot.rcw file with the changes made on line 97.

0 Kudos
2,178 Views
ufedor
NXP Employee
NXP Employee

Please provide corresponding U-Boot booting log as textual attachment.

0 Kudos
2,178 Views
kien_tran
Contributor II

Hi ufedor

Apologies for the late response, attached is the ouput of my uboot boot log

0 Kudos
2,178 Views
ufedor
NXP Employee
NXP Employee

The EC2 signals are physically multiplexed with the 1588 ones - refer to the LS1046ARDB schematics Sheet 8 (U26-U29).

These multiplexors are controlled through the LS1046ARDB CPLD register - refer to the QorIQ LS1046A Reference Design Board Reference Manual, 3.1.12 Ethernet Controller 2 Connection Control Register (REG_RGMII_1588_SEL).

0 Kudos
2,178 Views
kien_tran
Contributor II

Hi ufedor

I created a small program on the to run on the box so that it would program that CPLD register (Ethernet Controller 2 Connection Control Register) to change it's behavior from RGMII PHY (default value) to being a 1588 interface. However, after I have done so and check that /sys/class/ptp/ptp0/pps_enable is 1, I am not seeing the 1 PPS coming out out of the 1588 test header. 

Does there need to be PTP signal coming into RGMII2 port for this to work or any other available ports on this device? Am I missing any additional steps? I have tested my code and I am able to turn on the STATUS LED when I poke at that register. 

Any help would be appreciated. I have attached my code as well as the binary for you to test.

0 Kudos
2,178 Views
ufedor
NXP Employee
NXP Employee

Please refer to the LSDK Documentation:

IEEE 1588/802.1AS 

0 Kudos