P4080 CoreNet Platform Cache (CPC) configured as SRAM has a high access time standard deviation

[sverhoff]

I have configured the CPC as SRAM on the P4080, and the access time appears to have a high standard deviation. In other words, the time to access the SRAM is inconsistent. I have compared this with accessing NOR flash on the board, and accessing the SRAM has a higher standard deviation. I am using a XES Xpedite 5470 board. I have tried enabling and disabling the L1 and L2 caches without any success. All my tests have been running a u-boot stand alone program on bare metal, no operating system. This way I can easily control enabling and disabling the caches, as well as the external interrupts. However, doing all of this has not yielded the timing results I expected from accessing the SRAM. I am looking for consistent timing results.

Thanks,

Steve

[alexander_yakov]

By design, cache block consists of fast cache memory and address associative logic, this logic continuously monitoring bus transactions and perform necessary actions, if any particular memory access hits cache line.

When the cache is configured as SRAM, this associative logic as still active and may consume SRAM memory bandwidth and/or add some random latency to SRAM memory accesses.

The information on how to disable this logic is not specified in our public documentation. If this is critical for your application and you wish to disable this logic, please open a case to online technical support.

To enter a case to online technical support please perform the following:

1. Open www.nxp.com

2. Click on "Account" or your name in upper right corner and select "My account", enter your NXP site login/password if necessary.

3. Select "View all Support Methods" in Support section.

4. Click "Go to Tickets" in "Support Requests" section

5. The system should redirect you to this page https://nxpcommunity.force.com/community/CommunityContextPage 

6. At this page please create a new folder for support cases by clicking "Add a Folder". Typically - one folder per project.

7. When asked, enter project details - design stage, projected annual volume, end application type and application name.

8. When folder is created, please click "Add a new case" button to create support case.

Have a great day,
Alexander
TIC

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