P2040: MAC to MAC direct connection on serdes line

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P2040: MAC to MAC direct connection on serdes line

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gouravjain
Contributor IV

Dear all,

In my custom board, based on P2040, MAC to mAC connection is there. From P2040 to Vitesse ethernet switch VSC-7421.

Can any tell me what all changes are required in U-Boot?? Since it checks phy address for dtsec initilizations.

Another doubt is, does PCS layer autonegotiation required for dtesec initilization ?

In u-boot, tried to understand the dtsec initialization code flow. And found new module called TBI PHY. 

 

As far as i understood TBI module sits between MAC and outside phy device. MAC (PPC) <---> TBI (PPC)<---> external phy.

 

So first auto-negotiation should happen between TBI (PPC) and external phy then only MAC(PPC) will be configured. Correct me if im wrong.

 

But there is no TBI link status checking in code(LXR uboot/drivers/net/fm/eth.c ) after that mac is supposed to configure.

 

would be thankful if someone pls tell me where my understand is getting wronged? 

 

--

Gourav

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r8070z
NXP Employee
NXP Employee


Have a great day,

The dTSEC’s TBI belongs to SGMII interface. It implements the transmit portion of the physical coding sublayer as found in Clause 36 of IEEE 802.3z. In SGMII mode, packets conveyed across the GMII are encapsulated and encoded into 10-bit symbols and output to the SerDes. I.e. for the GMII it is like a PHY Address for the MII Management of the TBI Phy is defined in TBIPA register. Look for “SGMII Mode Register Initialization Steps” in the QorIQ Data Path Acceleration Architecture (DPAA) Reference Manual. You can download this manual from the P2040 page on NXP site
 https://www.nxp.com/products/microcontrollers-and-processors/power-architecture-processors/qoriq-pla...

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