P2020 asleep pin not go low, P2020 cannot run

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P2020 asleep pin not go low, P2020 cannot run

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声飞李
Contributor I

I have designed a board using P2020,the hardware config pins are connected to the CPLD,.The power up sequence is refer to the P2020RM.When the power up , 1) P2020 cannot  be connected to the emulator(trace32) ,cannot click "up",cannot click "stop" to check PPC register

2) p2020 is at the status of "asleep",it cannot go to the status of "ready". /HRESET pin drive by cpld , Meeting document requirements,but p2020 cannot boot from flash.

what can i do ? thanks very much!

webwxgetmsgimg1.jpg

Yellow :1.05V core voltage  blue:1.5Vvoltage   

webwxgetmsgimg.jpg

power on ,sysclk is 100MHz,HRESET_B meet this picture

ASLEEP pin is high , not go low...p2020 cannot boot

what can i do ?

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alexander_yakov
NXP Employee
NXP Employee

Please look P2020 Reference Manual, Section 4.5.2 "Power-on reset sequence"

Before ASLEEP is negated (step 11 in this sequence), all previous steps should be passed successfully.

If you said HRESET is negated properly (step 4), than please check all steps after step 4. As far as I can see, you need to check if RCW loading procedure is finished properly, and RCW value is correct, and also please check if everything is correct with PCIe interface (proper clock is applied to serdes module), so it can finish PCIe training procedure successfully.


Have a great day,
Alexander
TIC

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