P1021rdb - Problem loading Ramdisk file by the SPI-Uboot

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P1021rdb - Problem loading Ramdisk file by the SPI-Uboot

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3,075 Views
alfonsokame
Contributor III

Hi all,

I manage to run U-Boot from SPI flash by flashing the Yocto SPI uboot at the corresponding partition:

flash_eraseall /dev/mtd11

cat u-bootSPI.bin > /dev/mtd11

However, I have some problems as U-boot runs the ramdisk image that has been successfully tftped at an address. At one point, the system hangs. Here is the log

U-Boot 2011.12-00064-gbfb0c9a (Nov 15 2012 - 23:28:50)

CPU0:  P1021E, Version: 1.1, (0x80ec0111)

Core:  E500, Version: 5.1, (0x80212051)

Clock Configuration:

       CPU0:800  MHz, CPU1:800  MHz,

       CCB:400  MHz,

       DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:25   MHz

       QE:400  MHz

L1:    D-cache 32 kB enabled

       I-cache 32 kB enabled

Board: P1021RDB CPLD: V4.1 PCBA: V4.0

Error reading i2c boot information!

I2C:   ready

SPI:   ready

DRAM:  DDR: failed to read SPD from address 82  :smileyalert:

Error in DDR bus width configuration!    :smileyalert:

16 MiB (DDR3, 32-bit, CL=6, ECC off)

Flash: 16 MiB

L2:    256 KB enabled

NAND:  32 MiB

MMC:  FSL_SDHC: 0

SF: Detected S25FL128P_64K with page size 64 KiB, total 16 MiB

Firmware 'Microcode version 0.0.1 for P1021 r1.0' for 1021 V1.0

QE: uploading microcode 'Microcode for P1021 r1.0' version 0.0.1

PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000

PCIe1: Bus 00 - 00

PCIe2: Endpoint of PCIe SLOT, no link, regs @ 0xffe09000

PCIe2: Bus 01 - 01

In:    serial

Out:   serial

Err:   serial

Net:   eTSEC2 is in sgmii mode.

uploading VSC7385 microcode from ef020000

PHY reset timed out

eTSEC1, eTSEC2, eTSEC3

Hit any key to stop autoboot: 10  0

=> run ramboot

Speed: 1000, full duplex

Using eTSEC1 device

TFTP from server 10.a.b.c; our IP address is 10.d.e.f

Filename 'rootfs.ext2.gz.u-boot'.

Load address: 0x2000000

Loading: *#################################################################

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done

Bytes transferred = 28954008 (1b9cd98 hex)

Speed: 1000, full duplex

Using eTSEC1 device

TFTP from server 10.a.b.c; our IP address is 10.d.e.f

Filename 'uImage-p1021rdb.bin'.

Load address: 0x1000000

Loading: *#################################################################

     #################################################################

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     ####################################################

done

Bytes transferred = 3620878 (37400e hex)

Speed: 1000, full duplex

Using eTSEC1 device

TFTP from server 10.a.b.c; our IP address is 10.d.e.f

Filename 'uImage-p1021rdb.dtb'.

Load address: 0xc00000

Loading: *##

done

Bytes transferred = 25245 (629d hex)

## Booting kernel from Legacy Image at 01000000 ...

   Image Name:   Linux-3.0.34-rt55-02404-g1a39570

   Created:      2012-11-30  13:55:59 UTC

   Image Type:   PowerPC Linux Kernel Image (gzip compressed)

   Data Size:    3620814 Bytes = 3.5 MiB

   Load Address: 00000000

   Entry Point:  00000000

   Verifying Checksum ... OK

## Loading init Ramdisk from Legacy Image at 02000000 ...

   Image Name:   fsl-image-core-p1021rdb-20121116

   Created:      2012-11-16   9:09:58 UTC

   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)

   Data Size:    28953944 Bytes = 27.6 MiB :smileyalert:

   Load Address: 00000000

   Entry Point:  00000000

   Verifying Checksum ... OK

## Flattened Device Tree blob at 00c00000

   Booting using the fdt blob at 0x00c00000

   Uncompressing Kernel Image ... OK

ERROR: Failed to allocate 0x1b9cd58 bytes below 0xffffffff.

ramdisk - allocation error  :smileyalert:


Then, the system hangs here

It seems like I can't load the 27MB Ramdisk file using SPI-Uboot. Is it due to the DDR Configuration in the Uboot.bin file? Wrong DDR Bus Width configuration??

What should I do to fix this?

Where in the Yocto build source / Uboot source can I change the DDR Configuration? What kind of change?

Please Help!


Thank you very much!!


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1 Solution
1,777 Views
mattsm
Contributor III

SPI uses the on chip rom to configure DDR and should NOT be using SPD in u-boot. So I'm not entirely sure what's going on - but how did you produce the u-boot image you are trying to load?

View solution in original post

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5 Replies
1,777 Views
alfonsokame
Contributor III

Thanks very much for your replies!,

I built this U-boot using the Freescale Yocto SDK.

I had to disable the relevant configs: CONFIG_SPD_EEPROM and CONFIG_DDR_SPD in the U-boot sources.Then the board was able to boot properly using SPI-FLASH.

Thanks very much!!

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1,777 Views
yorksun
NXP Employee
NXP Employee

Look at your log

Error reading i2c boot information!

I believe this causes SPD off I2C bus. That's why you cannot read SPD. You need to check your I2C bus to make sure it works correctly.

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1,777 Views
mattsm
Contributor III

Does it work with a smaller ramdisk?

I suspect an issue with where u-boot is loading images too in memory, and then it has to extract to specific locations.

-M

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scottwood
NXP Employee
NXP Employee

It's a problem with DDR config: https://community.freescale.com/thread/302390

When I suggested posting a new thread about the DDR issue, I was expecting it to actually be about the DDR issue...

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1,778 Views
mattsm
Contributor III

SPI uses the on chip rom to configure DDR and should NOT be using SPD in u-boot. So I'm not entirely sure what's going on - but how did you produce the u-boot image you are trying to load?

0 Kudos