1. P1015 DDR3 ECC is an optional feature. You can use processor without ECC.
2. RDB board doesn't support ECC and can be only used without ECC support.
3. L1/L2 cache parity and ECC functionality are independent of DDR3 ECC. These are also optional features.
Using ECC almost eliminates soft errors in memory. The majority of soft errors in DRAM chips occur as a result of background alpha particle radiation and neutrons from cosmic ray, which may change the contents of one or more memory cells or interfere with the circuitry used to read/write them. The error rates increase rapidly with rising altitude. The rate is 300 times higher at 10–12 km that is typical for airplanes. The errors are accumulated during memory operation (unless the false data is overwritten).
If an application is an office equipment or a computer that is rebooted every day, soft errors are not critical. Though, if the equipment needs to work uninterruptedly during long time or used in avionics then using ECC is very desirable.
Reference board is for basic processor evaluation and using ECC is not critical.
Have a great day,
Pavel
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