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Layerscape PCIe Endpoint Development Boards
Are there any NXP or third-party development boards that feature a Layerscape processor such as the LS1021A as a PCIe Endpoint? All of the NXP development boards focus on the LS processors as PCIe RC.
There is this note here on modifying the LS1046A-RDB board so that mPCIe Slot 2 can be converted from RC to EP mode:
https://community.nxp.com/t5/QorIQ-Knowledge-Base/LS1046A-RDB-in-PCIe-Endpoint-Mode/ta-p/1107415
But even with that change, you would be left with a female mPCIe Slot on the board. I could not find an adapter that would allow you to connect that mPCIe Slot to a PCIe x1 connector on a desktop PC.
If we wanted to debug a PCIe driver to a Layerscape processor, it would be better to do so on a development board before performing a custom design.
Is PCIe EP mode supported on any of the Layerscape processors? From the KnowledgeBase note, it looks like it is supported on the LS1046.
Related to that, are there any NXP or third-party boards that have a PCIe x1 or x4 interface to a Layerscape processor in PCIe EP mode?
Is PCIe EP mode supported on any of the Layerscape processors? From the KnowledgeBase note, it looks like it is supported on the LS1046.
Related to that, are there any NXP or third-party boards that have a PCIe x1 or x4 interface to a Layerscape processor in PCIe EP mode?
Based upon a couple of sources (Table 4 of the Layerscape SDK for Yocto and Linux v5.12-rc7 Documentation/devicetree/bindings/pci/layerscape-pci.txt) it looks like the Layerscape processors that support PCIe EP mode are:
LS1046A
LS1088A
LS2088A
LX2160A (r2)
But I still could not find an NXP or third-party PCIe x1 or x4 development board that exercises this interface.
