LS1046A uses GIC400 or GIC 500?

[vijaykumardesai]

Does LS1046A uses GIC400 or GIC 500. In the Arm documentation "http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/index.html" it specifies that GIC400 is compliant with GICv2. And in "System Controllers | Generic Interrupt Controllers – Arm Developer " it specifies that we need to use GIC 500 for ARMv8 processors.

I am using LS1046A and if i check the ID register I see that "0200143b" which means it is GIC400. But I am wondering is it based on GICv2 right?

We are using Aarch64 execution state [based on ARMv8] and want to configure GIC now. It all seems messed up should I look at GIC400 document [though it says it only supports ARMV7]?

[r8070z]

Have a great day,

The LS1046A implements 4 Arm® Cortex®-A72 cores and a common interrupt controller GIC-400. The use of the GIC-500 is not mandatory for the A72 core. The GIC-400 supports Cortex-A5x / A72 systems with up to 8 cores. See ARM application note  AN472 - Integration of GICv2 Interrupt Controllers with ARM Cortex-A5x / Cortex-A72
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0472a/index.html

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