LS1043A IFC clock generation during power-on-reset

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

LS1043A IFC clock generation during power-on-reset

跳至解决方案
1,318 次查看
michael_machesk
Contributor I

Hi,

Question on the generation of clock outputs by the LS1043A processor during the power-on-reset sequence.  While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?  Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Thanks,

Mike

0 项奖励
回复
1 解答
1,259 次查看
ufedor
NXP Employee
NXP Employee

> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?

No.

> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Yes.

在原帖中查看解决方案

0 项奖励
回复
1 回复
1,260 次查看
ufedor
NXP Employee
NXP Employee

> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?

No.

> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Yes.

0 项奖励
回复