Hi,
Question on the generation of clock outputs by the LS1043A processor during the power-on-reset sequence. While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK? Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?
Thanks,
Mike
Solved! Go to Solution.
> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?
No.
> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?
Yes.
> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?
No.
> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?
Yes.