LS1043A IFC clock generation during power-on-reset

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LS1043A IFC clock generation during power-on-reset

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michael_machesk
Contributor I

Hi,

Question on the generation of clock outputs by the LS1043A processor during the power-on-reset sequence.  While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?  Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Thanks,

Mike

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ufedor
NXP Employee
NXP Employee

> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?

No.

> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Yes.

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ufedor
NXP Employee
NXP Employee

> While PORESET_B is being held asserted to the LS1043A will the processor generate a clock output on IFC_CLK?

No.

> Or does PORESET_B need to be deasserted first for the LS1043A to start generating a clock output on IFC_CLK?

Yes.

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