Here are the updated steps:
$ bitbake rcw -c cleansstate
$ bitbake rcw -c patch
Go to RCW source code folder, build_ls1028ardb/tmp/work/ls1028ardb-fsl-linux/rcw/git-r0/git/ls1028ardb/R_SQPP_0x85bb/, add the following commands at the end in rcw_1500_gpu600.rcw file
.pbi
write 0x01e00400,0x1800d000
blockcopy 0xa,0x400,0x1800d000,0x9435
.end
CCSR write command:
setting boot location pointer to 0x1800d000 in Boot location pointer low-order address (BOOTLOCPTRL) register present in DCFG.
block copy command:
blockcopy 0x0a,0x400,0x00100000,0x9400
Source : I2C EEPROM = 0xa
Source address: 0x400
Destination address: OCRAM (0x100000)
Block size : size of BL2 binary in bytes
$ bitbak rcw
$ bitbake atf -c cleansstate
$ bitbake atf
Get atf images bl2_flexspi_nor.pbl and fip_uboot.bin in build_ls1028ardb/tmp/deploy/images/ls1028ardb/atf/.
Programming EEPROM using I2C on U-Boot on LS1028ARDB
=> i2c probe
Valid chip addresses: 00 50 52 53 57 66 67 77 7C
=> i2c write 0xa0000000 0x50 0.2 0x11c
=> i2c read 0x50 0.2 0x114 0xc0000000
=> i2c write 0xa0000000 0x50 0x400.2 <size of bl2.bin>