We are using the LS1028A RDB development board. On page 17 of the schematic "spg-39071_a1.pdf" it shows DDR4 terminations tied to VTT_0V6. I verified on the board itself that this voltage is 0.6V. However, the Micron DDR4 memory literature states "The I/O buffer has been converted from push-pull to pseudo open drain (POD), as seen in the figure below. By being terminated to VDDQ instead of 1/2 of VDDQ, the size of and center of the signal swing can be custom-tailored to each design’s need." The data sheet for the DDR4 memory also shows VTT = VDDQ ("test load of 50ohm to VTT = VDDQ") in all situation except the connectivity test mode. Is VTT=VDDQ correct or is VTT=VDDQ/2 correct?
