LS1021ATSN-PA PTP error in Synchronized Qbv Demo

[donglinzhao]

Hi,

I have two LS1021ATSN-PA, and I want to run Synchronized Qbv Demo, so I do step by step according to OpenIL_ User_ Guide_Rev1.2.pdf，without board 2.  When I start ptp : ptp4l -i eth0 -p /dev/ptp0 -m -l 7 -t 1000, errors occur.

Also I doubt why the device is "eth0", when "eth2" in OPENIL is connected to SJA1105.

Thanks for any help.

Regards,

main output is:

ptp4l[19552.385]: sja1105: sync timer timeout
ptp4l[19552.515]: sja1105: sync timer timeout
ptp4l[19552.645]: sja1105: sync timer timeout
ptp4l[19552.720]: port 1: announce timeout
ptp4l[19552.720]: port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES
ptp4l[19552.720]: selected best master clock 00049f.fffe.ef0606
ptp4l[19552.720]: assuming the grand master role
ptp4l[19552.725]: port 1: master tx announce timeout
ptp4l[19552.725]: port 1: setting asCapable
ptp4l[19552.775]: sja1105: sync timer timeout
ptp4l[19552.775]: sja1105 reset requested
src/lib/ptp/ptp.c@221: sja1105_ptp_reset: Resetting PTP clock
src/lib/ptp/ptp.c@313: sja1105_ptp_clk_get: sja1105_ptp_clk_get: returned zero
ptp4l[19552.776]: rc1 0 rc2 -11 rc3 0
ptp4l[19552.776]: sja1105: calculating got time error
ptp4l[19552.905]: sja1105: sync timer timeout
ptp4l[19552.905]: sja1105 reset requested
src/lib/ptp/ptp.c@221: sja1105_ptp_reset: Resetting PTP clock
src/lib/ptp/ptp.c@313: sja1105_ptp_clk_get: sja1105_ptp_clk_get: returned zero
ptp4l[19552.906]: rc1 0 rc2 -11 rc3 0
ptp4l[19552.906]: sja1105: calculating got time error

The full output and the ethernet packets(wireshark) are in the attachment.

[vladimir_oltean · Accepted solution]

Hello,

The main error judging from your logs is this:

src/lib/ptp/ptp.c@313: sja1105_ptp_clk_get: sja1105_ptp_clk_get: returned zero
ptp4l[19552.776]: rc1 0 rc2 -11 rc3 0

It is being triggered from here in the PTP stack: linuxptp/sja1105.c at master · openil/linuxptp · GitHub (the actual SPI transaction is performed here: sja1105-tool/ptp.c at master · openil/sja1105-tool · GitHub ).

So the actual SPI transaction is failing, and libsja1105.so is returning -EAGAIN as a result.

The last time I investigated this, I found an SPI timing violation of the SJA1105's requirements. Could you please check that you have this DTS patch applied, and that the error still happens with it? ls1021a-tsn.dts: add 1us of delay between chip select and clk for SJA… · openil/linux@d2672c6 · GitH... 

Your other question is:

> Also I doubt why the device is "eth0", when "eth2" in OPENIL is connected to SJA1105.

For this demo eth0 is indeed correct. We are running the PTP synchronization over separate cabling, not through the Qbv network formed by the switches.

Thanks,

-Vladimir

[donglinzhao]

Hello,

Thank you for your reply. I'm sorry to see it late.

When I have compiled the branch "201805"(not the official v1.2 openil image file), the "ptp4l" command seems to work well.

(1)there is another problem, with my compiled image("201805"), I can't config the SJA1105. While I use the  official  openil image files or compile branch "201712", I can config the SJA1105. I am puzzled. The "qbv-ptp-board1.xml" is generated in Ubuntu 16.04.

(2) Is it possible that  PTP synchronization is run through  Qbv network formed by the switches? At moment, we use EtherCAT in PLC, but we want to use TSN in the future. 

output is:

[root@OpenIL:~]# sja1105-tool config load qbv-ptp-board1.xml
no element named "drpsotag"!
no element named "drpsitag"!
no element named "mirrcie"!
no element named "mirrcetag"!
no element named "ingmirrvid"!
no element named "ingmirrpcp"!
no element named "ingmirrdei"!
MAC Configuration entry is incomplete!
parse_config_table failed
Could not parse static config from XML!

Thanks,

donglin zhao

[vladimir_oltean]

(1) The sja1105-tool version needs to be the same between your PC, where you generate the XML, and the board, where you read it. The board sja1105-tool failing to recognize some XML elements (drpsotag, drpsitag etc which were introduced while extending support for the new SJA1105 P/Q/R/S line) indicates that the sja1105-tool on your board is older than the one on your PC, and fails to understand the new elements.

Your options are:

- Run sja1105-tool --version on the board, collect the git information of when it was built, then git checkout on the PC at that commit and re-generate the XML.

- Update the /usr/bin/sja1105-tool, /usr/lib/libsja1105.so and /etc/sja1105/sja1105.conf on the board to the newest available versions.

(2) I don't recall what the problem was at the time this demo was made, and this hasn't been revisited since then. But fundamentally I think it should work. Just make sure you have a working setup through eth0/eth1 first that you can use as a reference, before attempting to change the 1588 transmission ports to eth2. You can also experiment with VLAN-tagging your 1588 traffic with higher priority than iperf (0) but lower than ping (7) by following the guidelines/explanation here: TSN demo : Test and LBT · Issue #8 · openil/openil · GitHub.

Also, since you are going to be sending 1588 traffic through the SJA1105, watch out for its Transparent Clock behavior, which is active by default if the 1588 packets are sent as raw Ethernet payload (ptp4l -2). See this response for more details: Sync problem & sync clock algorithm specification need · Issue #7 · openil/openil · GitHub. You will probably *want* the switch to autonomously update the correctionField of your 1588 packets, since they are also subject to Qbv shaping and therefore asymmetrical delays as they pass through eth2.

[donglinzhao]

Really grateful for your reply. At this moment, I'm not familiar with the behavior of SJA1105 and 1588 ptp.  I will try to understand it according to your answer.