LS1021A 1588 hardware clarification

[toddblackmon]

I have a couple of hardware questions about the LS1021A IEEE 1588 hardware as well as the TWR-LS1021A.  It's not quite clear because the shared registers are in the eTSEC1 space while the pins available are shared with eTSEC3 pins.

1. Is there only a single shared 1588 timer which is used by all eTSEC modules for timestamping (as well as the 2 TRIG_IN timestamp registers)?

2. Regarding the TWR board, is the eTSEC3 controller usable when the 1588 header pins are used for 1588 functionality?

[alexander_yakov]

1. Yes, single timer for all interfaces.

2. External 1588 pins are not mandatory for proper timestamping operation. You can use these pins only if they are really necessary in your design. To connect external source, for example. Yes, external 1588 pins are shared with TSEC3 rgmii pins, so if you are using these pins as 1588 pins, than you can not use TSEC3.