IFC is getting wrong NAND page size?

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IFC is getting wrong NAND page size?

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cswarth
Contributor III

The question is, how does the integrated flash controller determine the characteristics of the NAND chip, and why does it get it wrong in our case?  

We are booting u-boot on an LS1046A board that closely resembles the reference board, LS1046A RDB.

However one difference is the choice of NAND chip.  Our prototype uses a Cypress S34MS04G2 NAND chip.

According to the uboot command `nand info`, the reference board uses a chip with 4K pages while our prototype uses a NAND chip with 2K pages.   The uboot `nand info` seems to get its information by querying the ONFI features of the NAND chip.  Those match the characteristics on the datasheet.

The nand interface on our board does not work beyond the first page - we just get ECC errors.   After adding debug statements, it looks like integrated flash controller (IFC) thinks this chip uses 4K pages.   We determined this by printing the value of the IFC_CSORn_NAND register in fsl_ifc_nand.c::fsl_ifc_chip_init().

How does the IFC determine the characteristics of the NAND chip, and why does it get it wrong in this case?

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cswarth
Contributor III

I'll answer my own question since I seem to know a bit about this interface now.

There is a static configuration word in QorIQ u-boot code to initialize the integrated flash controller (IFC).

Definition of constant - ls1046ardb.h (only one example of many)

Usage of constant  - fsl_ifc_spl.c

The initial value will vary depending on the exact machine header file you use.  In the case of the ls1046a, the header file sets the IFC to expect 4K pages.  If your NAND flash part uses a different page size, you'll have to modify the configuration word in the header file.

As far as I can tell this is the only place that the IFC is initialized in u-boot and linux.  The constant value of the CSOR is written to the configuration register in nand_spl_load_image() which is called when loading an image from NAND.    The problem with this code is it only applies if your image is loaded from NAND flash.  

I am loading the kernel image via TFTP, then booting that image on a rootfs in flash.  That doesn't work because the IFC never gets initialized by u-boot.  The kernel doesn't initialize the IFC so there is nobody telling the IFC what the pagesize should be.

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cswarth
Contributor III

I'll answer my own question since I seem to know a bit about this interface now.

There is a static configuration word in QorIQ u-boot code to initialize the integrated flash controller (IFC).

Definition of constant - ls1046ardb.h (only one example of many)

Usage of constant  - fsl_ifc_spl.c

The initial value will vary depending on the exact machine header file you use.  In the case of the ls1046a, the header file sets the IFC to expect 4K pages.  If your NAND flash part uses a different page size, you'll have to modify the configuration word in the header file.

As far as I can tell this is the only place that the IFC is initialized in u-boot and linux.  The constant value of the CSOR is written to the configuration register in nand_spl_load_image() which is called when loading an image from NAND.    The problem with this code is it only applies if your image is loaded from NAND flash.  

I am loading the kernel image via TFTP, then booting that image on a rootfs in flash.  That doesn't work because the IFC never gets initialized by u-boot.  The kernel doesn't initialize the IFC so there is nobody telling the IFC what the pagesize should be.

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sinanakman
Senior Contributor III

Hi Chris

I don't have access to LS1046 board but the Reference

Manual, in section 17.3.5 mentions that PGS is obtained
from the configuration word. You might want to go over

your RCW settings for IFC_MODE.

Hope this helps

Regards

Sinan Akman 

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cswarth
Contributor III

Thanks Sinan, I thought the RCW might have something to do with it.

In the QorIQ LS1046A Reference Manual, Rev. D is the latest one we have, and section 17.3.5  concerns the dual uart.  Maybe there is a more up-to-date manual I should be using.  Can you tell me the name and version of the manual you're referencing?

17.3.5 UART divisor most significant byte register (UDMBa)

The LS1046A Reference Manual does talk about IFC_MODE in the RCW, but that is only used when PBI_SRC points to IFC.  We are booting from SD card or QSPI.  Also we have been told by NXP that the LS1046a cannot boot from NAND, despite what the early documentation said.  In any case I don't see any way to set the NAND page size through IFC_MODE.   I've searched the document for "IFC MODE" and "PGS" and nothing looks promising so far.

FWIW, modifying the IFC_CSORn_NAND register to indicate 2K pages early in fsl_ifc_nand.c::fsl_ifc_chip_init() makes our nand flash work fine.  The good configuration even carries over to Linux.  There must be a more blessed way to do this, though.

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