I2C Linux Slave driver for LS1012a

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I2C Linux Slave driver for LS1012a

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Contributor II

I have a NXP LS1012a board, and my goal is to use it as I2C slave.

 

I want to have SoC-to-SoC communication via I2C, the other SoC will be Rpi3 (for the time being). Both of them are 3V3.

 

I was able to transfer data from LS1012a to Rpi3 as master-to-slave.

I was also able to transfer a byte from LS1012a to RPI3 using SDA, SCL pins on both devices, where RPI3 was used as Master, therefore, LS1012a was used as Slave (there is already 0x0a address reserved on the board).

 

Question: Could you please explain my steps what I need to do in order to make LS1012a work as a slave? There is the option with bit-banging GPIO pins from the userspace, but I Want to have it as a Kernel module.

AFAIU, I need follow i2c-slave-eeprom.c as example per this guide and create my own driver for LS1012A I2C slave, but I wanted to know if there is already one. 

 

I asked kinda similar question here in NXP forum (LS1012A - i2c slave mode , sorry for asking this twice, but I didnt receive any useful answer), they referred me to this - https://community.nxp.com/thread/340162. I didnt find it much helpful, it has a part of custom driver code. But i thought that I should've re-used this driver code, same is used for I2C master mode for this board (https://github.com/torvalds/linux/bl...sses/i2c-imx.c).

 

If I should ask linux-i2c maintainers, then please let me know their addresses because this guy does not answerwsa@sang-engineering.com.

 

Thanks

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Contributor II

Thanks, I got replies from Wolfram Sang. He referred me to this patch - [v6] i2c: imx: support slave mode for imx I2C driver - Patchwork 

I've figured out that there are 2 layers of drivers: backend driver and bus driver. I've written my backend driver, similar to i2c-slave-eeprom.c driver, however during probe got the error in kernel log "i2c_slave_register: not supported by adapter", this is coming from i2c-core, and it's checking client->adapter->algo->reg_slave , and as I see, current bus driver i2c-imx does not support SLAVE mode, though the I2C HW controller per datasheet switches to SLAVE when MSSL register (I2CR_MSTA) goes from 1 to 0.

Master/Slave mode select. When this bit is changed from 0 to 1, a START signal is generated on the bus and the master mode is selected. When this bit is changed from 1 to 0, a STOP signal is generated and the operation mode changes from master to slave. A STOP signal should be generated only if the IBIF flag is set. This field is cleared without generating a STOP signal when the master loses arbitration. 0 Slave Mode 1 Master Mode

Will follow the patch I mentioned above, and would like to contribute efforts if there is any room, because for now I'm stuck until patch is ready.

Thanks

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NXP TechSupport
NXP TechSupport

See the following pages for this configuration:

https://www.kernel.org/doc/Documentation/i2c/slave-interface

 

https://www.kernel.org/doc/Documentation/i2c/instantiating-devices

 

https://github.com/torvalds/linux/blob/master/drivers/i2c/i2c-slave-eeprom.c

 

https://lwn.net/Articles/611332/

Have a great day,
Pavel Chubakov

 

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Contributor II

Thanks, I got replies from Wolfram Sang. He referred me to this patch - [v6] i2c: imx: support slave mode for imx I2C driver - Patchwork 

I've figured out that there are 2 layers of drivers: backend driver and bus driver. I've written my backend driver, similar to i2c-slave-eeprom.c driver, however during probe got the error in kernel log "i2c_slave_register: not supported by adapter", this is coming from i2c-core, and it's checking client->adapter->algo->reg_slave , and as I see, current bus driver i2c-imx does not support SLAVE mode, though the I2C HW controller per datasheet switches to SLAVE when MSSL register (I2CR_MSTA) goes from 1 to 0.

Master/Slave mode select. When this bit is changed from 0 to 1, a START signal is generated on the bus and the master mode is selected. When this bit is changed from 1 to 0, a STOP signal is generated and the operation mode changes from master to slave. A STOP signal should be generated only if the IBIF flag is set. This field is cleared without generating a STOP signal when the master loses arbitration. 0 Slave Mode 1 Master Mode

Will follow the patch I mentioned above, and would like to contribute efforts if there is any room, because for now I'm stuck until patch is ready.

Thanks

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