Hi,I am using P1022 processor in my design. I have used 3 DDR3 chips each of 16 bit data width. Out of 3 DDR3s, data lines of two DDR3s are connected to MDQ[0:31] and 8 bit data lines of last DDR3 is connected to MDQ[32:39]. MDQS[0:3] and MDM[0:3] are connected to first 2 DDR3 ICs and MDQS4, MDM4 is connected to 8 bit DDR3 IC. Please let me know is this correct or any measures need to be taken care while connecting 8 bit DDR3 IC?
Have a great day,
As I see you want to implement 40-bit DDR data bus (2x16+8). The P1022 supports 40-bit DDR bus as 32-bit data and 8-bit of the ECC syndrome byte. Hence 8-bit of the third DDR chip has to be connected to the P1022 MECC[0:7] and MDM[8], MDQS[8]/MDQS_B[8].
For 16-bit DDR chip used for ECC byte, ensure that unused DQS/nDQS and DM inputs are tied via resistor to their nonactive power levels (GND or VDD). Ask DDR producer for recommended termination of the unused 8 data pins.
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