How does SFP+ works in LS1046ARDB-PB ?

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How does SFP+ works in LS1046ARDB-PB ?

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ken_jung
Contributor I

I want to design a router circuit based on LS1046ARDB-PB, but without CPLD.   

To do this, I need to completely understand the function of CPLD in the LS1046ARDB-PB.

Regarding the CPLD function related to SFP+, I have some question as below.     

1. Due to the I2C address confliction, I2C Lines are disconnected from STF connector.

Below is the Errata regarding this issue.

"E-00002 When SFP+ module is inserted, its I2C address conflicts with that of SPD Cut SFP cage’s I2C traces Rev. B Rev. B"

=> Does this mean that SFP+ in LS1046ARDB-PB can works without I2C control of  connector side SFT+ module?

2. In the CPLD circuit of LS1046ARDB-PB, STF+ related signals below are connected to CPLD. 

 Input : XFI1_TX_FAULT,XFI1_RX_VALID,XFI1_MOD_DEF from the  STF connector.

             XFI1_RETIMER_LOS from the retimer.

 Output:  XFI1_TX_DISABLE to the  STF connector.

 But, in the CPLD source cord, I cannot find any function or relation among these signals.

 What does CPLD do with above signals?

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ufedor
NXP TechSupport
NXP TechSupport

1) You wrote:

> Does this mean that SFP+ in LS1046ARDB-PB can works without I2C control of  connector side SFT+ module?

Your understanding is correct.

2) Levels of the XFI1_TX_FAULT, XFI1_RX_VALID, XFI1_MOD_DEF and XFI1_RETIMER_LOS can be read through the REG_SFP_STATUS of the CPLD.

Level of the XFI1_TX_DISABLE is controlled through the REG_SFP_TXEN register of the CPLD.

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ken_jung
Contributor I

Thanks

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ufedor
NXP TechSupport
NXP TechSupport

1) You wrote:

> Does this mean that SFP+ in LS1046ARDB-PB can works without I2C control of  connector side SFT+ module?

Your understanding is correct.

2) Levels of the XFI1_TX_FAULT, XFI1_RX_VALID, XFI1_MOD_DEF and XFI1_RETIMER_LOS can be read through the REG_SFP_STATUS of the CPLD.

Level of the XFI1_TX_DISABLE is controlled through the REG_SFP_TXEN register of the CPLD.

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ken_jung
Contributor I

I understand that   XFI1_TX_FAULT, XFI1_RX_VALID, XFI1_MOD_DEF and XFI1_RETIMER_LOS can be read, and XFI1_TX_DISABLE can be set as I want through CPLD.

My question is 

To design SFP+ HW circuit without CPLD, what logic circuit  should be implemented to make SFP+ work.

1. Should  XFI1_TX_FAULT, XFI1_RX_VALID, XFI1_MOD_DEF and XFI1_RETIMER_LOS be readable ?

  If yes, what action or logic should be implemented depening on read value of them

  

 2.  Should XFI1_TX_DISABLE be controled by the function of (XFI1_TX_FAULT, XFI1_RX_VALID, XFI1_MOD_DEF and XFI1_RETIMER_LOS)?

I think both question above can be answerd  with same answer

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ufedor
NXP TechSupport
NXP TechSupport

1) The signals could be read as testpoints.

2) No.

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