Failed to boot from Nor Flash

[brahmamyelagatu]

Hi ,

We are working on P1021 customized board. We tested with NAND flash and we observed P1021 Processor  is booted successfully.  Now when we tried with NOR flash we were able to  load  images into NOR flash by using Ethernet communication port. After Loading the images P1021 is not able boot from the NOR flash. Boot Configuration for NOR flash is  set to cfg_rom_loc[0:3] : 1110.

Here are following queries.

1.Is it mandatory to write Boot_sequencer to  boot P1021 processor from  NOR as we didn't write the boot_sequencer for NAND flash booting. If yes  how  the  Boot_sequencer is written for NOR.

2.What are the conditions  need to check and any other Init process is required while  NOR booting.

Can anyone share  the P1021 NOR booting sequence.

Regards,

Brahmam.

+91-9949105191

[yipingwang]

Hello brahmam yelagaturi,

Boot_sequencer for P1021 is not mandatory.

P1021 local bus signals are multiplexed with some QE funtions(eg. TDM).

You could boot from GPCM as the pins configuring eLBC signals by default, if you want to use them simultaneously, you need to use isolation logic on the board switch between QE and eLBC, please refer to P1021RDB design.

Hope the above is helpful and related with your current design.

Have a great day,
Yiping

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[brahmamyelagatu]

Hi,

Thanks for your reply.

I'm able to find  P1021RDB design in Freescale website.

Could you please share the P1021RDB doc and NOR booting sequence.

[brahmamyelagatu]

Hi Yiping,

Thanks for your reply.

I'm unable to find  P1021RDB design in Freescale website.

Could you please share the P1021RDB doc and NOR booting sequence.

[yipingwang]

Hello brahmam yelagaturi,

Please submit a service request to require P1021RDB hardware design documents from hardware team.

In addition, how did you build NOR u-boot?

Which version Linux SDK did you use?

Did you customize u-boot source based on P1021RDB or P1021MDS? Since P1021MDS doesn't support boot from NOR Flash.

Thanks,

Yiping

[brahmamyelagatu]

Hi Yiping,

Thanks for your reply.

We've designed our own  P1021 customized board for Industrial Automation.After few trails we've succeeded with NOR flash  loading and booting through ETSEC-1 of P1021.

We are not using any OS Kind of environments here. We've written bare-board drivers. But we're getting some issues in Etsec-2,Etsec-3(serdes) init process.

Is there any difference in ETSEC-2 and ETSEC-3(SERDES mode) controllers init process when it compared to ETSEC-1(RGMII mode).

Could you please verify the below Ethernet-2,3 init process for SERDES.

instance=etsec-2,etsec-3

#define ECNTRL_FIFM                      0x00008000

#define ECNTRL_CLRCNT                    0x00004000

#define ECNTRL_AUTOZ                     0x00002000

#define ECNTRL_STEN                      0x00001000

#define ECNTRL_GMIIM                     0x00000040

#define ECNTRL_TBIM                      0x00000020

#define ECNTRL_RPM                       0x00000010

#define ECNTRL_R100M                     0x00000008

#define ECNTRL_RMM                       0X00000004

#define ECNTRL_SGMIIM                    0x00000002

// initialize ethernet control register

     p1021EtsecMemMap[instance].ecntrl = ECNTRL_STEN | ECNTRL_CLRCNT | ECNTRL_AUTOZ | ECNTRL_RPM | ECNTRL_SGMIIM;

// initialize station address

    p1021EtsecMemMap[instance].macstnaddr1 =

        ((DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_6] << SHIFT_3_BYTES) |

        ((DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_5] << SHIFT_2_BYTES) |

        ((DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_4] << SHIFT_1_BYTES) |

         (DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_3];

    p1021EtsecMemMap[instance].macstnaddr2 =

        ((DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_2] << SHIFT_3_BYTES) |

        ((DWORD)etsec->config.macAddress[ETSEC_MAC_ADDR_OCTET_1] << SHIFT_2_BYTES);

  // initialize receive control register

    p1021EtsecMemMap[instance].rctrl = 0 ;

    // initialize maximum receive buffer length register

    p1021EtsecMemMap[instance].mrblr = ETSEC_BUFFER_LENGTH;

    // initialize DMA control register

    p1021EtsecMemMap[instance].dmactrl = DMACTRL_TDSEN | DMACTRL_TBDSEN;

    // initialize attribute register

    p1021EtsecMemMap[instance].attr = ATTR_RDSEN | ATTR_RBDSEN;

    // setup RX ring BD

    etsecInitRxRing( instance, etsec->config.useInterrupts);

    // setup TX ring BD

    etsecInitTxRing( instance, etsec->config.useInterrupts);

    // clear all interrupt, transmit, and receive events

    p1021EtsecMemMap[instance].ievent = IEVENT_CLR_ALL_EVENTS;

    p1021EtsecMemMap[instance].tstat = TSTAT_CLR_ALL_EVENTS;

    p1021EtsecMemMap[instance].rstat = RSTAT_CLR_ALL_EVENTS;

    // initialize the interrupt mask based on whether or not interrupts are being used

    {

        const DWORD IMASK[NUM_BOOLEANS] = {0, IMASK_ALL_EVENTS};

        const BOOLEAN USE_INTERRUPTS = min( etsec->config.useInterrupts, TRUE);

        p1021EtsecMemMap[instance].imask = IMASK[USE_INTERRUPTS];

    }

    // initialize the MAC config1 based on diagnostic type

    {

        const DWORD CFG1_LOOPBACK[NUM_BOOLEANS] = {0, MACCFG1_LOOPBACK};

        const BOOLEAN LOOPBACK = (BOOLEAN)(etsec->config.diagType == ETSEC_DT_MAC_INTERNAL_LOOPBACK);

        p1021EtsecMemMap[instance].maccfg1 = MACCFG1_RX_EN | MACCFG1_TX_EN | CFG1_LOOPBACK[LOOPBACK];

    }

    // set the PHY mode link type in the status

    etsecDeterminePhyModeLinkType( etsec);

    // set the BD and buffer addresses in the ETSEC descriptor

    etsec->status.txBds = (BD8_TSEC_T *)&etsecTxBd[instance];

    etsec->status.rxBds = (BD8_TSEC_T *)&etsecRxBd[instance];

    etsec->status.txBufs = etsecTxBuffer[instance][0];

    etsec->status.rxBufs = etsecRxBuffer[instance][0];

Regards,

Brahmam.

[yipingwang]

Hello brahmam yelagaturi,

For Non OS project design, you could refer to NetComm Software 4.4, which could be downloaded from NetComm Software Resources|Freescale.

Please refer to ETSEC_Init function in the attachment to do SGMII and RGMII initialization.

Have a great day,
Yiping

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