FRWY-LS1046A DDR4 Timing

[tian_shuliang]

Has ls1046a been tested for DDR4（MT40A1G16RC-062E）? Is there a relevant timing configuration available for struct dimm_params ddr_raw_timing?

[yipingwang · Accepted solution]

Hello salmon tian,

If you use different DDR type from the demo board, you need to use QCVS tool to calculate the initial DDR initialization parameters according to the DDR data sheet, then use DDRv tool to do validation and optimization.

Please refer to DDR Controller Configuration on LS2085/LS2080 Bringing up.

please refer to "QCVS_DDR_User_Guide. pdf" from www.nxp.com.

Thanks,

Yiping