Can't boot the LS1088A custom board

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Can't boot the LS1088A custom board

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PLeon
Contributor II

Hello, all.
We built our custom board as much close to ls1088ardb_pb as possible. The differences are:
- CPU receives differential LVDS 100Mhz clock: used as system clock.
- DDR clock is configured from CPU system clock
- Board uses discrete DDR4 chips: 4chips 512MBx16, ECC chip
- Custom board Power system:
1. On board CPLD provides predetermined DC/DC enable signals:
2. After all supply voltages are stable, deactivate CPU_Reset_B
- RCW source is QSPI flash device.

Before starting I checked that I can generate all (!) components in my flexbuild LSDK2108, load them into ARDB's QSPI and run - works fine.

Now, I started to adaptation to my board. I lowered the clocks as my chip is upto 1400MHz and:
[leonp@leonp FCSSRR_PPPP_0x1d_0x13]# cat rcw_1600_qspi.rcw  
#include <ls1088rdb.rcwi>

SYS_PLL_RAT=4
MEM_PLL_RAT=18
CGA_PLL1_RAT=12
CGA_PLL2_RAT=12
HWA_CGA_M1_CLK_SEL=2
HWA_CGA_M2_CLK_SEL=1
DDR_REFCLK_SEL=2
DRAM_LAT=1
BOOT_LOC=26
FLASH_MODE=0x2
SYSCLK_FREQ=0x258
IIC3_EXT=1
UART_BASE=3
IIC2_BASE=2
IIC3_BASE=1
IIC4_BASE=1
IFC_GRP_A_BASE=3
IFC_GRP_FGHI_BASE=1
QSPI_OCT_EN=0
EC1=1
EC2=1
USB1_CLK_FSEL=39
USB2_CLK_FSEL=39
SRDS_PRTCL_S1_LN0=1
SRDS_PRTCL_S1_LN1=1
SRDS_PRTCL_S1_LN2=4
SRDS_PRTCL_S1_LN3=4
SRDS_PRTCL_S2_LN0=7
SRDS_PRTCL_S2_LN1=7
SRDS_PRTCL_S2_LN2=7
SRDS_PRTCL_S2_LN3=7
SRDS_DIV_PEX_S1=1

.pbi
write 0x01360000,0x0001d400
.end

#include <bootlocptr_qspi.rcw>
#include <a009102_single.rcw>
#include <a010554_single.rcw>
#include <a008851.rcw>
#include <a010477.rcw>
#include <a009531.rcw>
/* CRC changed due to different a008851 implementation! */
/* CRC and Stop command (CRC 0xbc73054a)*/

The added "pbi" is setting CLKCSR to generate clock on CLKOUT1 pad as indication of something.

After powering up:
- RCW is correctly loaded into CPU, Asleep = "0", HRESET_B = "1"
- reading registers via OCD shows that service processor is stopped with unknow error code and requests reset.
- the CLKOUT1 pad shows no output. Setting it to this value manually generates the clock output at 4 times slower rate than expected. Checking this in the ARDB shows exactly the same result.

I will be very thankful for any help/hint what to check or what to correct.

 

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June_Lu
NXP TechSupport
NXP TechSupport

Why you change the platform PLL to 4?

When you change the clock, you should check the LS1088A Reference Manual, 4.8.8 IP Logic Clock Distribution and Configuration to see what's function will be affected, and make the function could works well.

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June_Lu
NXP TechSupport
NXP TechSupport

But in the RCW, check the CRC is correct.

And then add PBI one by one.

Add <bootlocptr_qspi.rcw> first.

Sorry, why it's related to the BL2?

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PLeon
Contributor II

Sir, the CRC is(!) correct as the register RCW_COMPLETION=1.

About the BL2 - may be I am wrong, but I don't know any other way to build the first block of QSPI. I run :

flex-builder -c atf -a arm64 -m ls1088ardb_pb -b qspi
And as I said I already removed all the PBI from the file rcw_1600_qspi.rcw and even put PBI_LEBGTH=0.

This generated rcw_1600_qspi.bin with zero PBI length field. But generating the ATF returned this field and PBI commands.

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June_Lu
NXP TechSupport
NXP TechSupport

Maybe you could delete all the PBI and then try to add one by one PBI to do the test.

To see if there is any findings.

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PLeon
Contributor II

Thanks.

Already tried this - no change.

We also noted that after setting "no PBI", the RCW generated is really without PBI, but the file BL2_qspi.pbl has 0x40 in this field of the RCW and really has added something.

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June_Lu
NXP TechSupport
NXP TechSupport

RCW_COMPLETION=1, please refer to LS1088A Reference Manual, page 318,

0

DONE

1b - Service Processor has completed the RCW loading

It seems RCW is done

PBI_COMPLETION=0x10000, please refer to LS1088A Reference Manual, page 320,

PBI error code.

23-16

ERR_CODE

00000001b - Service Processor released for Booting

0

DONE

PBI Completion Register (PBI_COMPLETIONR)

PBI done bit.

0b - Service Processor has not yet completed the PBI phase

It seems PBI has not completed.

 

Maybe check the PBI part, check the command one by one to confirm it.

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PLeon
Contributor II

Dear June_Lu,

Thank you for confirming that our statements are correct and SP didn't finished its work with PBI.
But as you can see from my RCW file, we do not provide anything different from the standard PBI commands provided by NXP! Only your works around and boot pointer.

So, what can we examine?

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June_Lu
NXP TechSupport
NXP TechSupport

Maybe you could check service processor Error Codes in the DCFG_SCRATCHRW3 register, check the value with LS1088A Reference Manual, page 431, Table 7-22. Error Codes

If the error is in RCW or PBI Phase, then the 8 bit error code is also written in Error code field in

RCW_COMPLETION or PBI_COMPLETION register respectively.

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PLeon
Contributor II

Dear June_Lu,
as i said, the code is unknown. Please, note that the error code in the example is also undefined in the table
Anyway, all 11 SCRATCHRW1 -SCRATCHRW11 registers are zero.
RCW_COMPLETION=1
PBI_COMPLETION=0x10000
Is there something more I can check?

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PLeon
Contributor II
Sorry!!! Error:
SCRATCHRW1 -SCRATCHRW11 registers:

> ls1088a.sp read_memory 0x1E00200 32 11
0x0 0x0 0x401 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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