Hello, I am trying to write some basic bootstrap code for an LS1043A processor.
At reset the processor comes up at EL3/secured of course, and I would like to bring it to a none-secure EL1 and branch to my application from there.
At first I need (to my understanding) to transition to EL2/non-secure on the way to EL1.
Configuring the SCR_EL3 register goes well, and so I get to EL3/non-secure mode.
I then configure the SPSR_EL3 with 0x3c9 (9 being the encoding for EL2 using it's stack pointer), and ELR_EL3 with my EL2_entry address. Then I call eret.
What happens next is I get a sync external instruction abort.
Any idea why this is happening? any help would be appreciated.
Thank,
Yaron
Code snippet:
mov x0, #0x501 //aarch64 + non - secure state
msr scr_el3, x0 //move to non-secure state
mov x0, #0x3c9 //prepare transition to EL2
msr spsr_el3, x0
adr x0, el2_entry
msr elr_el3, x0
eret
OK, got it.
Need to configure the flash memory as non-secure via the CSU before going into EL2 non-secure mode, otherwise the memory is not accessible.
Since I am going baremetal here (no u-boot to configure stuff for me), I have to do all the configurations myself, and this one escaped me.